2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)最新文献

A comparison study of time-dependent dielectric breakdown for analog and digital circuit's optimal accelerated test regions 模拟电路与数字电路最佳加速试验区介电击穿随时间变化的比较研究

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311628

Kexin Yang, Taizhi Liu, Rui Zhang, L. Milor

引用次数: 7

A 0.2V-to-5V fully-integrated reconfigurable buck/boost switched-capacitor voltage regulator for self-powered wireless sensors 用于自供电无线传感器的0.2 v至5v完全集成可重构降压/升压开关电容稳压器

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311640

Kang Wei, D. Ma

引用次数: 2

FPGA synthesis of an stereo image matching architecture for autonomous mobile robots 自主移动机器人立体图像匹配体系的FPGA合成

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311639

G. Doménech-Asensi, R. Ruiz-Merino, J. Zapata, J. López-Alcantud, J. Díaz-Madrid

引用次数: 0

Body bias generators for ultra low voltage circuits in FDSOI technology FDSOI技术中超低电压电路体偏置发生器

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311638

Diego Justo, David Cavalheiro, F. Moll

引用次数: 6

Design and validation of a platform for electromagnetic fault injection 电磁故障注入平台的设计与验证

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311630

J. Balasch, D. Arumí, S. Manich

{"title":"Design and validation of a platform for electromagnetic fault injection","authors":"J. Balasch, D. Arumí, S. Manich","doi":"10.1109/DCIS.2017.8311630","DOIUrl":"https://doi.org/10.1109/DCIS.2017.8311630","url":null,"abstract":"Security is acknowledged as one of the main challenges in the design and deployment of embedded circuits. Devices need to operate on-the-field safely and correctly, even when at physical reach of potential adversaries. One of the most powerful techniques to compromise the correct functioning of a device are fault injection attacks. They enable an active adversary to trigger errors on a circuit in order to bypass security features or to gain knowledge of security-sensitive information. There are several methods to induce such errors. In this work we focus on the injection of faults through the electromagnetic (EM) channel. In particular, we document our efforts towards building a suitable platform for EM pulse injection. We design a pulse injection circuit that can provide currents over 20 A to an EM injector in order to generate abrupt variations of the EM field on the vicinity of a circuit. We validate the suitability of our platform by applying a well-know attack on an embedded 8-bit microcontroller implementing the AES block cipher. In particular, we show how to extract the AES secret cryptographic keys stored in the device by careful injection of faults during the encryption operations and simple analysis of the erroneous outputs.","PeriodicalId":136788,"journal":{"name":"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131585476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Detectability of structural defects using octree encoding 利用八叉树编码检测结构缺陷

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311625

Álvaro Gómez-Pau, L. Balado, J. Figueras

{"title":"Detectability of structural defects using octree encoding","authors":"Álvaro Gómez-Pau, L. Balado, J. Figueras","doi":"10.1109/DCIS.2017.8311625","DOIUrl":"https://doi.org/10.1109/DCIS.2017.8311625","url":null,"abstract":"Testing of analogue and M-S circuits using octree encoding in alternate measurements space has been shown effective to detect parametric failures. In this paper, the analysis of the viability to use octree encoding to detect catastrophic faults has been explored. In addition to the classical short and open defects, the class of controlling open faults causing unpredictable behaviour have been considered. In this category, fall some opens causing floating gate defects where the high impedance node gets a voltage imposed by the capacitive coupling of surrounding lines and possible leakage currents to the floating node. The method has been applied to a Biquad filter where a wide class of catastrophic defects (shorts, path opens and floating opens) have been injected. Parametric and catastrophic failures were detected using the same alternate test procedure achieving significant savings in test application time. The results show that with a simple octree based on two indirect measures detectability was guaranteed forall shorts, and path opens. A significant number of floating gate opens is also detectable. The floating gate defects escaping assured detection would be those in which the floating gate during test excitation produces voltages at the open gate(s) similar to the voltage of the non-defective circuit.","PeriodicalId":136788,"journal":{"name":"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117151704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Automated test program reordering for efficient SBST 自动测试程序重新排序，高效的SBST

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311634

R. Cantoro, E. Cetrulo, E. Sanchez, M. Reorda, A. Voza

引用次数: 4

Variable-length transmission lines for self-healing systems and reconfigurable millimeter-wave integrated circuits 用于自愈系统和可重构毫米波集成电路的变长传输线

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311641

David del Río, Iñaki Gurutzeaga, H. Solar, A. Beriain, Ainhoa Rezola, I. Vélez, R. Berenguer

引用次数: 1

Skin effect formula for metal strips in laminated substrates 层压基材中金属条的集肤效应公式

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311642

S. Ahyoune, J. Sieiro, M. N. Vidal, J. López-Villegas

引用次数: 3

Random forest training stage acceleration using graphics processing units 随机森林训练阶段加速使用图形处理单元

2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS) Pub Date : 2017-11-01 DOI: 10.1109/DCIS.2017.8311636

Abián Hernández, H. Fabelo, S. Ortega, Abelardo Báez, G. Callicó, R. Sarmiento

引用次数: 5