A comparison study of time-dependent dielectric breakdown for analog and digital circuit's optimal accelerated test regions

Kexin Yang, Taizhi Liu, Rui Zhang, L. Milor
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引用次数: 7

Abstract

This paper investigates not only the traditional reliability concern, frontend-of-line dielectric breakdown (GTDDB), but also the newly emerging wearout mechanism, Middle-of-Line (MOL) time dependent dielectric breakdown (MTDDB). The optimal accelerated test conditions for these mechanisms are presented, which involves separate test conditions for each mechanism. To perform circuit-level accelerated life test, the optimal conditions vary for analog and digital circuits and need to be carefully considered before conducting the tests. Only tests in the optimal region are able to reflect the lifetime of the target wearout mechanism. Circuit designers will benefit due to the fact that different test conditions detect different wearout mechanisms. Therefore, the accelerated tests will provide information on the causes of failure, and circuit designers can use this information to redesign their circuits in a more robust and reliable way.
模拟电路与数字电路最佳加速试验区介电击穿随时间变化的比较研究
本文不仅研究了传统的可靠性问题——线前介质击穿(GTDDB),而且还研究了新出现的磨损机制——线中线时间相关介质击穿(MTDDB)。提出了这些机构的最佳加速试验条件,其中每个机构都有单独的试验条件。为了进行电路级加速寿命测试,模拟和数字电路的最佳条件各不相同,在进行测试之前需要仔细考虑。只有在最优区域内的试验才能反映目标磨损机制的寿命。由于不同的测试条件检测不同的磨损机制,电路设计者将受益。因此,加速测试将提供有关故障原因的信息,电路设计人员可以使用这些信息以更稳健和可靠的方式重新设计电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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