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IEEE Transactions on Circuits and Systems II: Express Briefs最新文献

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Fault Tolerant Control of Switched Affine Systems With Application to Boost Converter: The Transition-Dependent Bumpless Transfer Approach 应用于升压变换器的切换仿射系统容错控制：过渡相关的无颠簸传输方法
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-08-07 DOI: 10.1109/TCSII.2025.3596833
Fang Liao;Yanzheng Zhu;Rongni Yang;Jian Zhang;Donghua Zhou
{"title":"Fault Tolerant Control of Switched Affine Systems With Application to Boost Converter: The Transition-Dependent Bumpless Transfer Approach","authors":"Fang Liao;Yanzheng Zhu;Rongni Yang;Jian Zhang;Donghua Zhou","doi":"10.1109/TCSII.2025.3596833","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3596833","url":null,"abstract":"The <inline-formula> <tex-math>${mathcal {L}}_{infty }$ </tex-math></inline-formula> bumpless transfer fault-tolerant control problem is addressed for continuous-time switched affine systems with actuator faults and bounded disturbances. A novel piecewise transition-dependent fault-tolerant controller is designed, by enforcing the specified bumps limitation constraints, sufficient conditions for the existence of the fault-tolerant controller are derived satisfying a new average dwell time constraint, which guarantees the practical stability of the closed-loop system and the bumpless transfer as switching and faults occur. Finally, both practicability and validity of the developed methods are illustrated through a case study of DC-DC boost converter.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1328-1332"},"PeriodicalIF":4.9,"publicationDate":"2025-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
BETA: A Bit-Grained Transformer Attention Accelerator With Efficient Early Termination BETA：具有有效早期终止的位粒度变压器注意力加速器
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-08-06 DOI: 10.1109/TCSII.2025.3596228
Huizheng Wang;Hongbin Wang;Zhiheng Yue;Jingyao Liu;Taiquan Wei;Shaojun Wei;Yang Hu;Shouyi Yin
{"title":"BETA: A Bit-Grained Transformer Attention Accelerator With Efficient Early Termination","authors":"Huizheng Wang;Hongbin Wang;Zhiheng Yue;Jingyao Liu;Taiquan Wei;Shaojun Wei;Yang Hu;Shouyi Yin","doi":"10.1109/TCSII.2025.3596228","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3596228","url":null,"abstract":"Attention-based large language models (LLMs) have revolutionized the natural language processing (NLP). Despite their impressive effectiveness, the quadratic complexity of self-attention incurs heavy computational and memory burdens. Dynamic sparse attention techniques emerge as a solution, however, the introduced extra prediction stage, coupled with costly data memory access, diminishes their hardware efficiency. To address these limitations, this brief proposes BETA, a fine-grained algorithm-architecture co-design tailored for sparse attention. First, a bit-grained multi-round filter (BMF) prediction is proposed to unveil and eliminate redundant memory access hidden in the sparsity prediction stage. Second, an adaptive and lightweight max-based threshold selection (MTS) strategy is developed to work in concert with the bit-wise prediction process. Third, a bit-wise out-of-order execution (BOOE) scheme is employed to enhance hardware utilization during bit-wise prediction. Finally, an elaborate architecture is designed to translate the theoretical complexity reduction into practical performance improvement. Implementation results demonstrate that BETA achieves <inline-formula> <tex-math>$5.4times $ </tex-math></inline-formula>, <inline-formula> <tex-math>$6.5times $ </tex-math></inline-formula>, <inline-formula> <tex-math>$1.8times $ </tex-math></inline-formula> improvements in energy efficiency than the state-of-the-art Transformer accelerators Sanger, Spatten and SOFA, respectively, while maintaining comparable inference accuracy.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 10","pages":"1433-1437"},"PeriodicalIF":4.9,"publicationDate":"2025-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced Small-Signal Model for Charge-Controlled LLC Resonant Converters Using Time-Domain Analysis 基于时域分析的电荷控制LLC谐振变换器增强小信号模型
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-08-06 DOI: 10.1109/TCSII.2025.3596316
Wenzhe Chen;Kangli Liu;Hongqi Ding;Yichao Sun;Cheng Jin;Pengyu Wang;Jianfeng Zhao
{"title":"Enhanced Small-Signal Model for Charge-Controlled LLC Resonant Converters Using Time-Domain Analysis","authors":"Wenzhe Chen;Kangli Liu;Hongqi Ding;Yichao Sun;Cheng Jin;Pengyu Wang;Jianfeng Zhao","doi":"10.1109/TCSII.2025.3596316","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3596316","url":null,"abstract":"The conventional models employ fundamental harmonic approximation for charge-controlled LLC resonant converter. However, when the switching frequency deviates from the resonant frequency, significant distortion occurs in the state variables, leading to degraded accuracy in the models. To address this issue, this brief proposes a novel small-signal modeling approach based on time-domain analysis. The proposed method first derives the simplified time-domain operating constraints for the converter. The simplified constraints relieve the computation burden and reduce the number of intermediate variables, making it more suitable for small-signal modeling. Next, the relationships between small-signal variables are derived from these constraints. Finally, a complete mathematical model of the charge-controlled LLC resonant converter is constructed. Experimental validation is performed on a 200V/1kW LLC resonant converter prototype. Both simulation and experimental results confirm the superior accuracy of the proposed model.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 10","pages":"1453-1457"},"PeriodicalIF":4.9,"publicationDate":"2025-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimal Control of Active Load Interconnected System in DC Microgrid via an Adaptive Decentralized Event-Triggered Mechanism 基于自适应分散事件触发机制的直流微电网主动负荷互联系统最优控制
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-08-05 DOI: 10.1109/TCSII.2025.3595844
Dongyuan Zhang;Hanguang Su;Huaguang Zhang;Jiayue Sun;Zemeng Mi;Yi Zong
{"title":"Optimal Control of Active Load Interconnected System in DC Microgrid via an Adaptive Decentralized Event-Triggered Mechanism","authors":"Dongyuan Zhang;Hanguang Su;Huaguang Zhang;Jiayue Sun;Zemeng Mi;Yi Zong","doi":"10.1109/TCSII.2025.3595844","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3595844","url":null,"abstract":"In this brief, an innovative adaptive event-triggered control approach is devised to solve the optimal control problems of power buffer systems in DC microgrids. The optimal control problem of power buffers is addressed via a decentralized framework to ensure mutual interconnection among subsystems. Additionally, the adaptive dynamic programming (ADP) method is integrated with an event-triggered mechanism to derive an approximate optimal control strategy, which can effectively reduce the communication overhead between different subsystems. Moreover, the stability of the interconnected system is proved and the Zeno behavior is rigorously excluded through theoretical analysis. The effectiveness of the proposed method is validated through a DC microgrid case study.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 10","pages":"1393-1397"},"PeriodicalIF":4.9,"publicationDate":"2025-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145315484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Automatic Design of Multi-Fold Hyperchaotic System Using Parallel Fractal Algorithm 基于并行分形算法的多重超混沌系统自动设计
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-31 DOI: 10.1109/TCSII.2025.3594405
Ning Wang;Mengkai Cui;Muhammad Marwan;Yan Yang;Han Bao;Herbert Ho-Ching Iu;Quan Xu
{"title":"Automatic Design of Multi-Fold Hyperchaotic System Using Parallel Fractal Algorithm","authors":"Ning Wang;Mengkai Cui;Muhammad Marwan;Yan Yang;Han Bao;Herbert Ho-Ching Iu;Quan Xu","doi":"10.1109/TCSII.2025.3594405","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3594405","url":null,"abstract":"This brief presents a simple one-step parallel fractal algorithm for automatic design of multi-fold hyperchaotic system from scroll/wing-type seed system. It is shown that the desired number of folds can be generated via a simple parametric control. Two representative application cases of four-dimensional and six-dimensional multi-fold no-equilibrium hyperchaotic systems are presented. For a double-wing seed attractor, the method will generate <inline-formula> <tex-math>$2^{m}$ </tex-math></inline-formula> wings under each pair of m-fold transformation. In contrast with existing designs, the proposed algorithm is automatic and has wide applicability in generating various numbers of folds in multiple directions. Simulation studies and hardware implementations are conducted to verify the feasibility of the proposed algorithm.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1313-1317"},"PeriodicalIF":4.9,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Circuits and Systems Society Information IEEE电路与系统学会信息
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-31 DOI: 10.1109/TCSII.2025.3589810
{"title":"IEEE Circuits and Systems Society Information","authors":"","doi":"10.1109/TCSII.2025.3589810","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3589810","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 8","pages":"C3-C3"},"PeriodicalIF":4.9,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11106323","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144750874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2.5-48 Gb/s 16.6 ns Turn-On Time NRZ/PAM4 Pulse-Based Rapid-On/Off Baud-Rate CDR for Mobile Interfaces 一种2.5 ~ 48gb /s 16.6 ns开埠时间NRZ/PAM4脉冲快速开/关波特率话单技术
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-31 DOI: 10.1109/TCSII.2025.3594475
Jihee Kim;Yunhee Lee;Hyun-Seok Choi;Yoona Lee;Sanghee Lee;Woo-Seok Choi
{"title":"A 2.5-48 Gb/s 16.6 ns Turn-On Time NRZ/PAM4 Pulse-Based Rapid-On/Off Baud-Rate CDR for Mobile Interfaces","authors":"Jihee Kim;Yunhee Lee;Hyun-Seok Choi;Yoona Lee;Sanghee Lee;Woo-Seok Choi","doi":"10.1109/TCSII.2025.3594475","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3594475","url":null,"abstract":"This brief presents an NRZ/PAM4 rapid-on/off baud-rate clock and data recovery (CDR) for mobile interfaces, featuring power-efficient bandwidth scaling. To minimize power overhead due to large turn-on time, a pulse-based rapid clock recovery method is proposed. This method estimates and immediately compensates for initial phase error based on a pre-trained look-up table, significantly reducing the CDR’s turn-on time. In addition, a background PAM4 eye-climbing algorithm (ECA) addresses the sub-optimal lock point issue of conventional baud-rate phase detectors by adjusting the lock point to maximize the vertical eye margin (VEM). The prototype receiver fabricated in a 28 nm CMOS supports data rates from 2.5 to 48Gb/s, accommodating both legacy and next-generation mobile interfaces. It achieves an energy efficiency of 1.43 pJ/b at 48 Gb/s while demonstrating a fast turn-on time of 16.6 ns, enabling superior energy efficiency across various effective data rates. Moreover, the PAM4 ECA increases VEM of the PAM4 middle eye by 18 mV, ensuring error-free operation.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1193-1197"},"PeriodicalIF":4.9,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2.54 Gbps, 1.22 pJ/Bit, IR-UWB Transmitter With a Power-Gating Technique 基于功率门控技术的2.54 Gbps， 1.22 pJ/Bit IR-UWB发射机
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-30 DOI: 10.1109/TCSII.2025.3594199
Kyoungseok Song;Donggun Lee;Geunhaeng Lee;Yonghui Li;Tae Wook Kim
{"title":"A 2.54 Gbps, 1.22 pJ/Bit, IR-UWB Transmitter With a Power-Gating Technique","authors":"Kyoungseok Song;Donggun Lee;Geunhaeng Lee;Yonghui Li;Tae Wook Kim","doi":"10.1109/TCSII.2025.3594199","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3594199","url":null,"abstract":"This brief presents an impulse radio-ultrawideband (IR-UWB) transmitter (Tx) that achieves high energy efficiency and data rate through a power-gating (PG) technique and hybrid modulation scheme. PG minimizes static power consumption by activating the digitally controlled oscillator (DCO) only during transmission. A hybrid modulation scheme combines frequency- shift keying (FSK) with digitalized multi pulse position modulation (D-MPPM) and pulse width modulation (PWM) to increase modulation order. Implemented in 6.5-8.5 GHz, the proposed PG-DCO Tx achieves a data rate of 2.54 Gbps with an energy efficiency of 1.22 pJ/bit, approaching the 1 pJ/bit energy-efficiency barrier for UWB transmitters.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1208-1212"},"PeriodicalIF":4.9,"publicationDate":"2025-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 91.7% Peak-Efficiency 48V-to-1V Pseudo Two-Stage Two-Phase Hybrid Buck Converter 91.7%峰值效率48v - 1v伪两级两相混合降压变换器
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-30 DOI: 10.1109/TCSII.2025.3593898
Young-Ju Oh;Chan-Ho Lee;Jeong-Hun Kim;Hyeonho Park;Dowon Jeong;Sung-Wan Hong
{"title":"A 91.7% Peak-Efficiency 48V-to-1V Pseudo Two-Stage Two-Phase Hybrid Buck Converter","authors":"Young-Ju Oh;Chan-Ho Lee;Jeong-Hun Kim;Hyeonho Park;Dowon Jeong;Sung-Wan Hong","doi":"10.1109/TCSII.2025.3593898","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3593898","url":null,"abstract":"This brief proposes a pseudo two-stage two-phase (P2S-2P) buck converter that enhances power efficiency by reducing current in the high-voltage (HV) domain, which has large parasitic components. In contrast, the low-voltage (LV) domain, which has small parasitic components, supplies the majority of the output current (IO) through two inductors that automatically balance their currents. The proposed converter achieves a peak efficiency of 91.7% at an input voltage (VIN) of 48V, an output voltage (VO) of 1V, and the IO of 1.5A. The chip was fabricated using a 180-nm BCD process.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1318-1322"},"PeriodicalIF":4.9,"publicationDate":"2025-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Transactions on Circuits and Systems--II: Express Briefs Publication Information IEEE电路与系统汇刊——II：快报简报出版信息
IF 4.9 2区 工程技术
IEEE Transactions on Circuits and Systems II: Express Briefs Pub Date : 2025-07-30 DOI: 10.1109/TCSII.2025.3589808
{"title":"IEEE Transactions on Circuits and Systems--II: Express Briefs Publication Information","authors":"","doi":"10.1109/TCSII.2025.3589808","DOIUrl":"https://doi.org/10.1109/TCSII.2025.3589808","url":null,"abstract":"","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 8","pages":"C2-C2"},"PeriodicalIF":4.9,"publicationDate":"2025-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11104808","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144739827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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