Young-Ju Oh;Chan-Ho Lee;Jeong-Hun Kim;Hyeonho Park;Dowon Jeong;Sung-Wan Hong
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引用次数: 0
Abstract
This brief proposes a pseudo two-stage two-phase (P2S-2P) buck converter that enhances power efficiency by reducing current in the high-voltage (HV) domain, which has large parasitic components. In contrast, the low-voltage (LV) domain, which has small parasitic components, supplies the majority of the output current (IO) through two inductors that automatically balance their currents. The proposed converter achieves a peak efficiency of 91.7% at an input voltage (VIN) of 48V, an output voltage (VO) of 1V, and the IO of 1.5A. The chip was fabricated using a 180-nm BCD process.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.