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Iee Journal on Solidstate and Electron Devices最新文献

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Model for amorphous-silicon solar cells 非晶硅太阳能电池模型
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-06-01 DOI: 10.1049/IJ-SSED:19780015
B. Debney
{"title":"Model for amorphous-silicon solar cells","authors":"B. Debney","doi":"10.1049/IJ-SSED:19780015","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780015","url":null,"abstract":"Owing to the short lifetimes and low mobilities of carriers in amorphous silicon, diffusion is not the dominant mechanism responsible for determining the collection of photogenerated electrons and holes. It has been established that the photocurrent is determined by the photogeneration of carriers in the depletion region and their subsequent removal with the aid of the built-in field. This is confirmed here through an analysis of the p-i-n cell spectral response curve published by Carlson and Wronski. From the analysis, a value of 10-8 cm2/Vis estimated for the product of lifetime and mobility for photogenerated holes, which is consistent with a short diffusion length. A calculation is presented of the current/voltage characteristic for a model Schottky-barrier solar cell under illumination. This gives a short-circuit current in agreement with the measured values, and demonstrates the reduced fill factor which can be expected from the voltage dependence of the photocurrent. This model predicts an a.m.l efficiency of about 8%.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122358167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrochemical preparation of cadmium sulphide for low-cost production of thin-film Cds/Cu2S solar cells 用于低成本生产薄膜Cds/Cu2S太阳能电池的硫化镉电化学制备
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-06-01 DOI: 10.1049/IJ-SSED:19780014
A. N. Casperd, K. Moore, W. Moodie
{"title":"Electrochemical preparation of cadmium sulphide for low-cost production of thin-film Cds/Cu2S solar cells","authors":"A. N. Casperd, K. Moore, W. Moodie","doi":"10.1049/IJ-SSED:19780014","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780014","url":null,"abstract":"There is a need for an economic alternative to the fabrication of CdS/Cu2S cells by the Clevite process, and the result of an approach based on anodic sulphurisation of cadmium to cadmium sulphide in a manner analogous to the protective surface oxidation of aluminium by anodisation is presented. The exposed surface of cadmium metal, in sheet or electroplated form, is sulphurised electrochemically in an organosulphur bath to form CdS. The p-n heterojunction is completed by a dry-barrier conversion to Cu2S.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130702317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Solar cells fabricated by ionised-cluster beam technology 用电离束技术制造的太阳能电池
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-06-01 DOI: 10.1049/IJ-SSED:19780017
T. Takagi, I. Yamada, A. Sasaki
{"title":"Solar cells fabricated by ionised-cluster beam technology","authors":"T. Takagi, I. Yamada, A. Sasaki","doi":"10.1049/IJ-SSED:19780017","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780017","url":null,"abstract":"It is shown that ionised-cluster beam deposition and epitaxial techniques are useful for the fabrication of photocells. A thin layer of single-crystal silicon and a very thin conductive metal film made by these techniques are used to obtain wide-spectrum sensitivity of the cells. The p-n junction diode has been made by n-type silicon epitaxy onto a p-type silicon substrate. The Schottky-barrier diode has been made by depositing a gold film onto an n-type silicon substrate. These techniques have a high potential for making an ohmic-contact electrode with good adhesion. The alloy process can be eliminated from the fabrication of a photocell. Finally, the current status of solar-cell technology in Japan is reviewed.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122044072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of an edge-illuminated graded-gap solar cell 边缘照明梯度间隙太阳能电池的分析
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-06-01 DOI: 10.1049/IJ-SSED:19780029
J. Parrott
{"title":"Analysis of an edge-illuminated graded-gap solar cell","authors":"J. Parrott","doi":"10.1049/IJ-SSED:19780029","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780029","url":null,"abstract":"It has been established that even under ideal conditions the efficiency of a semiconductor photovoltaic cell with a single energy gap cannot exceed approximately 30%. One possible configuration for avoiding this limitation is the edge-illuminated graded-gap solar cell, in which the plane of the p-n junction is parallel to the incident radiation and the gap is graded from a larger value at the illuminated surface to a smaller at the back. Calculations were carried out for (a) fixed front-surface energy gap and variable backsurface gap, and (b) fixed back-surface gap and variable front-surface gap. In each case the fixed gap was 1.47 eV. The best result was an increase of theoretical efficiency from 27.2 to 28.3% for the first case with a back surface gap of l.27eV at a thousand suns. To increase the efficiency further it would be necessary to segment the device.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132760064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Meteorological effects on Schottky-barrier solar cells 肖特基屏障太阳能电池的气象效应
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-06-01 DOI: 10.1049/IJ-SSED:19780021
C. Klimpke, P. Landsberg
{"title":"Meteorological effects on Schottky-barrier solar cells","authors":"C. Klimpke, P. Landsberg","doi":"10.1049/IJ-SSED:19780021","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780021","url":null,"abstract":"The effect of different meteorological conditions on Schottky-barrier solar-cell outputs has been investigated, using a model for an n-type solar cell. Similar results to those for p-n junction cells have been obtained, namely that although the output power density is reduced, a much higher conversion efficiency is possible when the solar cell is illuminated with diffuse radiation. The effect of the density of interfacial states, and the metal work function, upon the J/V characteristics and on the conversion efficiency is shown to be an important feature of Schottky-barrier solar cells.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134472639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Novel light-modulated m.o.s. transistor 新型光调制mos晶体管
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-05-01 DOI: 10.1049/IJ-SSED.1978.0038
B. Flynn, J. Mavor, A. Owen
{"title":"Novel light-modulated m.o.s. transistor","authors":"B. Flynn, J. Mavor, A. Owen","doi":"10.1049/IJ-SSED.1978.0038","DOIUrl":"https://doi.org/10.1049/IJ-SSED.1978.0038","url":null,"abstract":"A light-modulated m.o.s. transistor is proposed, the opitcal sensitivity being based on the phenomenon of photosensitised charge injection from a photoconductor into an insulator. Details are given of the design, fabrication and testing of a simple prototype structure that demonstrates the feasibility of the device.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121714976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of static and dynamic characteristics in v.i.l. 静、动态特性分析。
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-05-01 DOI: 10.1049/IJ-SSED:19780036
S. Kato, Osamu Tomisawa, Y. Horiba, T. Nakano
{"title":"Analysis of static and dynamic characteristics in v.i.l.","authors":"S. Kato, Osamu Tomisawa, Y. Horiba, T. Nakano","doi":"10.1049/IJ-SSED:19780036","DOIUrl":"https://doi.org/10.1049/IJ-SSED:19780036","url":null,"abstract":"After a survey of the electrical characteristics for vertical injection logic (v.i.l.) structure compared with the conventional i.i.l. structure, static characteristics and dynamic behaviour for the v.i.l. structure are analysed by using a simplified one-dimensional model, and experimental verifications are carried out. The analysis reveals that the minimum propagation delay time is determined by the cutoff frequency of the n-p-n transistor and the effective lifetime of holes injected into the epitaxial layer from the base. The bottom injector in the v.i.l. structure reduces the effective lifetime of the holes, which results in improved minimum propagation delay times. In addition, the improvement in the minimum propagation delay times due to a reduction in the effective lifetime is more pronounced when the cutoff frequency is higher. Experimental results show that the minimum propagation delay time for v.i.l. is improved by a factor of 1.6, as predicted from the analysis.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129138574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Experimental comparison of lifetime-measurement techniques for m.o.s. capacitors mos电容器寿命测量技术的实验比较
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-05-01 DOI: 10.1049/IJ-SSED.1978.0034
C. Morandi, G. Spadini
{"title":"Experimental comparison of lifetime-measurement techniques for m.o.s. capacitors","authors":"C. Morandi, G. Spadini","doi":"10.1049/IJ-SSED.1978.0034","DOIUrl":"https://doi.org/10.1049/IJ-SSED.1978.0034","url":null,"abstract":"Three techniques commonly used to determine lifetime in m.o.s. capacitors are compared experimentally and very good agreement is found. It is shown that, in favourable circumstances, the combined use of the three may help to localise the active defect in the forbidden gap. Finally, some experimental results obtained with two of the techniques over a wide temperature range are discussed.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116109956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Changes in effective channel length due to hot-electron trapping in short-channel m.o.s.t.s 短通道mos中热电子俘获引起的有效通道长度变化
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-03-01 DOI: 10.1049/IJ-SSED.1978.0010
D. J. Coe
{"title":"Changes in effective channel length due to hot-electron trapping in short-channel m.o.s.t.s","authors":"D. J. Coe","doi":"10.1049/IJ-SSED.1978.0010","DOIUrl":"https://doi.org/10.1049/IJ-SSED.1978.0010","url":null,"abstract":"Stressed operation of p-channel m.o.s.t.s in the pre-avalanche region can cause the injection of hot electrons into the gate oxide adjacent to the source and drain junction. Trapping of this injected charge causes a localised reduction of the threshold voltage near the stressed junction and a consequent reduction of the effective channel length. Measurement of the saturated output conductance shows that the Early effect is much reduced after selective charge trapping. The phenomenon can be explained by regarding the stressed transistors as a composite device consisting of a number of series-connected m.o.s.t.s with differing threshold voltages, and can be used deliberately to reduce short-channel effects in small m.o.s.t.s.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123989409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Nonplanar power field-effect transistor (V-f.e.t.) 非平面功率场效应晶体管
Iee Journal on Solidstate and Electron Devices Pub Date : 1978-03-01 DOI: 10.1049/IJ-SSED.1978.0009
T. D. Mok, C. Salama
{"title":"Nonplanar power field-effect transistor (V-f.e.t.)","authors":"T. D. Mok, C. Salama","doi":"10.1049/IJ-SSED.1978.0009","DOIUrl":"https://doi.org/10.1049/IJ-SSED.1978.0009","url":null,"abstract":"A high-frequency power junction field-effect transistor with a nonplanar V-shaped channel fabricated by preferential etching of (100) silicon is described. The structure of the transistor is very simple; it requires only three photolithographic masking steps, and the result is a short-channel device with a high packing density. The theory of operation and the fabrication of this device are discussed, and the experimental characteristics of a 30-channel interdigitated structure having an effective channel length of 2.8?m, a channel width of 0.82cm and an active area of 0.1mm2 are presented. This transistor exhibits a low-frequency transconductance of 87mS, a cutoff frequency of 1.2GHz and a power-dissipation density of 21W/mm2 of chip area. The application of the transistor in a tuned power amplifier operating at 224 MHz is discussed.","PeriodicalId":127114,"journal":{"name":"Iee Journal on Solidstate and Electron Devices","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131164525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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