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Time-Effective Component Selection Automation in Electric Vehicles using Openly-Available Data 基于公开数据的电动汽车时效性部件选择自动化
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773512
Gabriel Ferreira da Silva, Ignacio Galiano Zurbriggen, Francisco Paz, M. Ordonez
{"title":"Time-Effective Component Selection Automation in Electric Vehicles using Openly-Available Data","authors":"Gabriel Ferreira da Silva, Ignacio Galiano Zurbriggen, Francisco Paz, M. Ordonez","doi":"10.1109/APEC43599.2022.9773512","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773512","url":null,"abstract":"Transportation electrification is at the core of the possible solutions to many challenges the world is currently facing. Efficient vehicle electrification has the potential to si-multaneously reduce greenhouse gasses emissions and decrease range anxiety. This paper proposes a methodology for component selection in each part of electric vehicle (EV) architecture, demon-strating the method with Power Electronics switches selection. A Design Automation (DA) simulation platform is introduced to facilitate EV model-based design. The approach includes considerations on the mechanical and electrical domain of the vehicle, accounting for the effect of the component in the whole system, and yielding the solution that optimizes range. Using the proposed method, the Pareto Front of a large pool of candidates is found, yielding a range-efficiency variation of approximately 16% within it.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"301 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116253459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Non-Isolated Dual-Output High-Step-Down Converter 一种非隔离双输出高降压变换器
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773525
Y. Yau
{"title":"A Non-Isolated Dual-Output High-Step-Down Converter","authors":"Y. Yau","doi":"10.1109/APEC43599.2022.9773525","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773525","url":null,"abstract":"The AC-DC converter for general communication and network communication equipment can generate 48V DC bus. The traditional buck converter directly generates an output voltage less than 3.3V DC from a 48V DC bus with PWM duty cycle being under 10%, which often causes problems in controller design difficulties and high switching losses. In a real digital circuit system, different digital chips usually require different operating voltages, and this means that multiple voltage rails of the power supply are required. This paper proposes a dual-output high-step-down converter, which consists of 6 actives switches. The proposed topology has the following three advantages: (1) zero voltage switching technology can improve conversion efficiency. (2) the buck-type voltage gain doesn't have non-linear component, and therefore the existing buck controller IC can be used. (3) multiple output voltages can be controlled by a single controller. (4) it may be extended to more than 2 output rails.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123729040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Power Oscillation Characterization and Component Sizing For Asymmetrical Fault Ride Through of Grid Forming Converters 网格成形变流器非对称故障穿越功率振荡特性及元件尺寸
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773757
Md Rifat Kaisar Rachi, M. Awal, I. Husain
{"title":"Power Oscillation Characterization and Component Sizing For Asymmetrical Fault Ride Through of Grid Forming Converters","authors":"Md Rifat Kaisar Rachi, M. Awal, I. Husain","doi":"10.1109/APEC43599.2022.9773757","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773757","url":null,"abstract":"Recent fault ride-through codes require the grid-connected converters, that interface renewable energy resources, to maintain grid connection during fault. In this work, we have analyzed the oscillation in the injected real and reactive power that a grid forming converter introduces as it attempts to improve the voltage at the point of common coupling during an asymmetrical fault ride through. A new current reference generation method is proposed that facilitates closed-form quantification of both real and reactive power oscillation during fault ride through operation. Effect of the resulting voltage oscillation at twice the grid frequency on the input DC bus capacitors corresponding to real power oscillation is analyzed, and the subsequent oscillatory current requirement for the DC bus capacitor is derived for appropriate component sizing. Additionally, it gives control over the negative sequence current injection during fault to assist fault identification based on bus capacitor current capability and allowed bus voltage oscillation. The theoretical analysis presented in this work is validated through simulation in PLECS for different symmetrical and asymmetrical fault scenarios. Experimental result for a 3kV A system with a three-phase, grid forming converter during both symmetric and asymmetric fault ride through are provided as well.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116810751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Accurate Digital Delay Compensation of Synchronous Frame Current Regulator with Variable Switching Frequencies 可变开关频率同步帧电流调节器的精确数字延迟补偿
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773415
Yang Xu, Yingfeng Ji, Jonathan Hair, Nurani S. Chandrasekhar
{"title":"Accurate Digital Delay Compensation of Synchronous Frame Current Regulator with Variable Switching Frequencies","authors":"Yang Xu, Yingfeng Ji, Jonathan Hair, Nurani S. Chandrasekhar","doi":"10.1109/APEC43599.2022.9773415","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773415","url":null,"abstract":"High-power machines and high-speed machines often operate at low sampling-to-fundamental frequency (S2F) ratios. The inherent digital delay must be properly compensated at low S2F ratios. The technique of variable switching frequencies aims to distribute the PWM harmonics and to reduce the noise and vibration. The digital delay, if not compensated accurately, will introduce voltage error which leads to current ripple and torque ripple when the switching frequency varies. This paper proposes a method to compensate the digital delay considering the switching frequency variations and a methodology to design the current regulator with the compensation. Experimental results show that the current ripple and torque ripple are significantly reduced with the proposed compensation method. The harmonic loss is reduced and system efficiency is increased.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":" 25","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120834406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Cyber-Attack Detection for Active Neutral Point Clamped (ANPC) Photovoltaic (PV) Converter using Kalman Filter 基于卡尔曼滤波的有源中性点箝位(ANPC)光伏变流器网络攻击检测
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773382
Jinan Zhang, Jin Ye
{"title":"Cyber-Attack Detection for Active Neutral Point Clamped (ANPC) Photovoltaic (PV) Converter using Kalman Filter","authors":"Jinan Zhang, Jin Ye","doi":"10.1109/APEC43599.2022.9773382","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773382","url":null,"abstract":"With the upgrading of communication technology, cyber threats to power converters are increasing. In this paper, a model-based cyber-attack detection methodology is proposed for the interleaved Active neutral point clamped (ANPC) Photovoltaic (PV) converter. The proposed methodology identifies cyber-attacks using two estimations based on the Kalman filter and the state-space model of the ANPC PV converter. The residual between the two estimations is analyzed from a statistical perspective. Based on the Cumulative Sum (CUSUM) Control Chart, the standard errors shift of the residual is used to identify cyber-attacks. Besides, to validate the feasibility of the proposed methodology, several conditions are considered in the simulation, including white noise in the sensor, irradiance variation, and cyber-attacks in the PV converter. The simulation result demonstrates the proposed method can identify cyber-attacks in the ANPC PV converter.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124031914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Experimental validation of a chip area optimized 3.3 kV SiC half bridge for HVDC converters 一种芯片面积优化的3.3 kV SiC半桥用于高压直流变流器的实验验证
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773514
L. Bergmann, M. Wahle, M. Bakran
{"title":"Experimental validation of a chip area optimized 3.3 kV SiC half bridge for HVDC converters","authors":"L. Bergmann, M. Wahle, M. Bakran","doi":"10.1109/APEC43599.2022.9773514","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773514","url":null,"abstract":"The content of this paper demonstrates the experi-mental validation of a semiconductor area optimized 3.3 kV SiC half bridge for HVDC converters. The core of this work is a comparison on sub module level between the conventional half bridge and the asymmetric HVDC specific half bridge, which features an asymmetrical semiconductor area between high side and low side switch. The main motivation of this approach is to save costly SiC semiconductor area and exploit the asymmetrical stress of low side and high side switches in the sub modules of a Modular Multilevel Converter (MM C). The system level design is already published and therefore, only the basics it will be presented. The focus is on switching characteristics of the MOSFET and the freewheeling body diode. The impact of design methods on dead time optimization, switching over-voltage, reverse recovery behavior, current slope and switching losses is investigated.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128322841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Capacitively-Isolated Dual Extended LC-tank Hybrid Switched-Capacitor Converter 电容隔离双扩展LC-tank混合开关电容器变换器
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773640
A. Jackson, N. Ellis, R. Pilawa-Podgurski
{"title":"A Capacitively-Isolated Dual Extended LC-tank Hybrid Switched-Capacitor Converter","authors":"A. Jackson, N. Ellis, R. Pilawa-Podgurski","doi":"10.1109/APEC43599.2022.9773640","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773640","url":null,"abstract":"This work introduces a resonant Dickson-type converter topology whose flying capacitors provide dielectric isolation between input and output terminals. For even conversion ratios, it achieves complete soft-charging of all of its flying capacitors with a convenient 50% duty cycle. Additionally, switch count is reduced relative to prior work and no distributed bypass capacitor column is required. Moreover, this topology actively drives both of its inductors without the requirement for mutual coupling between magnetic elements. A discrete 4:1 hardware prototype designed for 48 V up to rectified US mains applications is demonstrated and achieves a high power density of 2,010 W/in3 with a 140 V input voltage and 941 kHz switching frequency.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128395003","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
One-Digital-Sampling Commutation Method for Low Inductance Brushless DC Motor 低电感无刷直流电动机的单数字采样换相方法
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773603
Juwon Lee, Gyu Cheol Lim, Jung-Ik Ha
{"title":"One-Digital-Sampling Commutation Method for Low Inductance Brushless DC Motor","authors":"Juwon Lee, Gyu Cheol Lim, Jung-Ik Ha","doi":"10.1109/APEC43599.2022.9773603","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773603","url":null,"abstract":"In a coreless stator brushless DC motor, ripple-less torque control is a challenging issue. Especially, due to its low inductance, conventional commutation methods that exclude the effects of the stator resistance and the digital sampling are less effective and even detrimental to minimizing the torque ripple. To overcome the limitations, this paper proposes a new commutation method for low inductance brushless DC motor. The proposed method synchronizes the period of the commutation region with one digital sampling period and it also considers the effect of stator resistance. Three cases of the proposed method, depending on the relation between the sampling period and the motor electric constant, are introduced. In addition, the back electromotive force is measured offline and the time delay due to the full-digital system is also compensated for the accurate duty ratio calculation. The validation of the proposed method is demonstrated by the experiment and the results show that the torque ripple is reduced by 18% compared to the conventional method.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128475823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Low Cost and Small Component Count Hybrid Converter with Energy Management Control for Unmanned Aerial Vehicle Applications 具有能量管理控制的低成本小组件混合转换器在无人机中的应用
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773739
Xueshen Zhang, Keon-Woo Kim, Yeonho Jeong
{"title":"Low Cost and Small Component Count Hybrid Converter with Energy Management Control for Unmanned Aerial Vehicle Applications","authors":"Xueshen Zhang, Keon-Woo Kim, Yeonho Jeong","doi":"10.1109/APEC43599.2022.9773739","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773739","url":null,"abstract":"This paper proposes a novel non-isolated three-port converter having dual-input and single-output (DISO) for low cost and small component counts. A combination of power sources, including a fuel cell and battery, can be widely used in various applications to achieve high energy density and extend a battery lifetime. However, its power systems can be complex because two independent power converters are required. Therefore, the simple non-isolated DC/DC power converter is proposed in this paper It can have three essential functions: 1) charging and discharging operations for battery, 2) a regulation of the output voltage, and 3) energy management control according to three operational states. The proposed converter can achieve high power density and low cost from a small number of components. The proposed converter operates under an energy management mechanism proposed to utilize multiple power sources efficiently. The feasibility of the proposed method was verified with a 400 W prototype converter (16.8 V/24 A), and the experimental results validated the theoretical analysis and showed the effectiveness of the proposed converter.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129777135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Modelling of Quasi-parallel Sigma DC-DC Converter for High Efficiency Single-stage Voltage Regulator 高效单级稳压器的准并联Sigma DC-DC变换器建模
2022 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2022-03-20 DOI: 10.1109/APEC43599.2022.9773531
Lingyun Li, Yijie Qian, Limin Yu, Shen Xu, Weifeng Sun
{"title":"Modelling of Quasi-parallel Sigma DC-DC Converter for High Efficiency Single-stage Voltage Regulator","authors":"Lingyun Li, Yijie Qian, Limin Yu, Shen Xu, Weifeng Sun","doi":"10.1109/APEC43599.2022.9773531","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773531","url":null,"abstract":"With the development of the processor performance of the data center serves, the power supply requirements have become more and more restrict. The 48V input power supply system is proposed to reduce the impedance losses of the entire power system. The quasi-parallel architecture is one of the typical single-stage VRMs designed for 48V input power supply system. One of the biggest challenges of quasi-parallel converter design is that the quasi-parallel converter is a novel architecture and its structure is relatively distinctive, so there is limited number of the modelling research of quasi-parallel converter makes it difficult to realize the accurate close-loop control design. Some of existing researches give the model of the Sigma converter which is one of the most popular converters of quasi-parallel architecture. However, the accuracy in the middle frequency range still needs to be improved. This paper proposes a decoupling method to model the quasi-parallel converter, and then a more accurate modelling approach of Sigma converter is proposed including the input & output impedance model and control to output transfer function. The verification board is implemented using GaN and Infineon's optiMOS power devises and FPGA Xilinx K7.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125666795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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