Modelling of Quasi-parallel Sigma DC-DC Converter for High Efficiency Single-stage Voltage Regulator

With the development of the processor performance of the data center serves, the power supply requirements have become more and more restrict. The 48V input power supply system is proposed to reduce the impedance losses of the entire power system. The quasi-parallel architecture is one of the typical single-stage VRMs designed for 48V input power supply system. One of the biggest challenges of quasi-parallel converter design is that the quasi-parallel converter is a novel architecture and its structure is relatively distinctive, so there is limited number of the modelling research of quasi-parallel converter makes it difficult to realize the accurate close-loop control design. Some of existing researches give the model of the Sigma converter which is one of the most popular converters of quasi-parallel architecture. However, the accuracy in the middle frequency range still needs to be improved. This paper proposes a decoupling method to model the quasi-parallel converter, and then a more accurate modelling approach of Sigma converter is proposed including the input & output impedance model and control to output transfer function. The verification board is implemented using GaN and Infineon's optiMOS power devises and FPGA Xilinx K7.