Zhi-hong Feng, Junjun Deng, Lantian Li, Baokun Zhang, Zhenpo Wang
{"title":"Design of Multi-Receiver IPT System for Electric Vehicles Considering Transfer Efficiency and Different Power Requirements","authors":"Zhi-hong Feng, Junjun Deng, Lantian Li, Baokun Zhang, Zhenpo Wang","doi":"10.1109/APEC43599.2022.9773731","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773731","url":null,"abstract":"Inductive power transfer (IPT) system is a reasonable power supply option for electric vehicles (EVs), especially the multi-receiver IPT system showing potential in the charge-while-drive scenario. From the circuit analysis, it can be seen difficult to analytically get the solution that reach both different power requirements in receivers and optimal system transfer efficiency. This study demonstrates an optimization-based design method of the single-transmitter coupled multi-receiver (S-M) wireless charger for EVs, considering the optimization of system transfer efficiency under power requirements that can be different in each receiver. A two-level mathematical optimization model is constructed to deal with the complex interacting relationships, in which different power requirements are restricted specifically in subsystem levels. The inconsistency of subsystems is coordinated and optimal system efficiency is realized in the system level. Take the dual-receiver system as an example, an optimized feasible solution is reached and can be quickly updated when power requirements changed. Finally, the optimization-based design method has been validated by both simulation model and constructed prototype.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129891004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A DC Capacitor-Less Two-Terminal Unified Active Capacitor and Inductor","authors":"Anwesha Mukhopadhyay, Manas Palmal, V. John","doi":"10.1109/APEC43599.2022.9773513","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773513","url":null,"abstract":"The emulation of passive components by power electronics converter (PEC) has gained significant popularity in recent times. Apart from improving the power density, it offers the flexibility to vary capacitance and inductance values within a specific range. However, any PEC emulating the behaviour of a capacitor or an inductor also requires passive filters, which can outweigh the power density enhancement achieved by the emulation effort. In particular, for the two-terminal active capacitor inductor (ACI), which is operationally similar to a single-phase STATCOM, DC capacitance requirement of the PEC is substantial. A more compact filter is achieved if a higher ripple is allowed across the DC bus while not compromising the desired emulation objective. The present work proposes a DC capacitor-less topology for realising an active, two-terminal capacitor and inductor unified in a single unit. Continuous control of the unified ACI converter is developed to achieve a smooth transition from capacitive to inductive characteristics and vice versa. A laboratory-scale prototype is developed to verify the concept and functionality of the proposed circuit.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130596923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Chattering-Free Event-Trigger Fast Recovery Stable Digital Sliding Mode Control in DC-DC Converters","authors":"S. Kapat","doi":"10.1109/APEC43599.2022.9773578","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773578","url":null,"abstract":"Sliding mode control (SMC) offers fast transient per-formance and robust disturbance rejection in DC-DC converters by suitably designing a switching surface. In this paper, novel digital SMC architectures are proposed, in which chattering-free sliding motion is achieved using event-triggered sampling and constant on/off-time modulation. Steady-state switching frequency can be programmed by adjusting the constant timing parameter using an in-built all-digital PLL. First-order as well as higher-order switching surfaces can be realized using mixed-signal or fully digital implementation, in which the output voltage is sampled once in a switching cycle. The former requires one ADC and one DAC to keep the fast changing inductor current in the analog domain, whereas only one time-multiplexed ADC is sufficient for the later. Further, a unified discrete-time (DT) framework is proposed to design a DT switching surface and to carry out stability analysis during reaching phase as well as sliding motion. Thereafter, a real-time gain scheduling method is considered, which achieves near time optimal transient recovery in a boost converter using a simple first-order surface. This helps in reducing hardware complexity and resources, thereby making it useful for high frequency implementation. Experimental results of a boost converter are presented to justify the effectiveness of the proposed architectures.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123862292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dual-Path Hybrid Synchronous Rectifier in Active Clamp Forward Converter for Inductor Current Reduction","authors":"Katsuhiro Hata, Sadanori Suzuki, M. Takamiya","doi":"10.1109/APEC43599.2022.9773609","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773609","url":null,"abstract":"A dual-path hybrid synchronous rectifier (DPH-SR) in active clamp forward (ACF) converters is proposed for inductor current reduction to solve inductor cooling problems under heavy load. In the proposed DPH-SR, the flying capacitor also supplies current to the output, thereby reducing the inductor current. In the measurement, the peak efficiency of the ACF converters with the proposed DPH-SR and conventional SR was 90.9 % and 89.0 % at 10 AOUT, respectively, resulting in the improvement in efficiency by 1.9 %. In addition, the inductor conduction loss of the proposed DPH-SR is reduced by 43.0 % by reducing the inductor current by 24.8 % at 20 AOUT.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"167 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123346608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nan Lin, Yuheng Wu, M. Mahmud, Yue Zhao, A. Mantooth
{"title":"Current Balancing Methods for a High Power Silicon Carbide Inverter with Paralleled Modules","authors":"Nan Lin, Yuheng Wu, M. Mahmud, Yue Zhao, A. Mantooth","doi":"10.1109/APEC43599.2022.9773496","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773496","url":null,"abstract":"Power module paralleling is a common approach to increase the current capacity. However, paralleled modules often have current sharing issues due to the parameter mismatches. In this work, two high power inverters using paralleled Wolfs peed silicon carbide (SiC) modules in each phase are utilized to study the current sharing issues and validate the effectiveness of the proposed reinforced current balancing method, which is a two-fold approach to address both steady-state and transient current mismatch. The paralleling branches are connected to the load through long cables to suppress the steady-state imbalance using the cable self-inductance. To further compensate the transient current imbalance occurs during every switching period, the modulation index and phase angle of the module reference signal are adjusted. Both simulation and experimental results are presented in this paper to validate the effectiveness of the proposed method.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114309383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Bisi, Long Nguyen, P. Zuk, Ashish Gokhale, Keith Coffey, Te-Chuan Liu, B. Cruse, T. Hosoda, M. Kamiyama, P. Parikh, U. Mishra
{"title":"Short-Circuit Protection for GaN Power Devices with Integrated Current Limiter and Commercial Gate Driver","authors":"D. Bisi, Long Nguyen, P. Zuk, Ashish Gokhale, Keith Coffey, Te-Chuan Liu, B. Cruse, T. Hosoda, M. Kamiyama, P. Parikh, U. Mishra","doi":"10.1109/APEC43599.2022.9773446","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773446","url":null,"abstract":"A successful short-circuit protection technology for GaN power devices paired with a commercial gate driver is demonstrated. The GaN power devices have an integrated Short-Circuit Current Limiter (SCCL) to achieve a sufficiently long short-circuit withstanding time (SCWT). The SCWT is tuned from 0.3 µs to 2 µs (a remarkable 7x increase) with a relatively small penalty in on-resistance. The gate-driver has desaturation detection (DESAT) and soft shutdown circuitry to achieve a fast protection response of 800 ns with high noise immunity greater than 100 V/ns. The combination of GaN power devices with SCCL and a commercial gate driver with fast DESAT and high noise immunity allows short-circuit protection and fail-safe operation of GaN power electronics for additional robustness in motor drive applications.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124222043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, T. Sakurai, Shinichiro Hayashi, K. Wada, I. Omura, M. Takamiya
{"title":"Equalization of DC and Surge Components of Drain Current of Two Parallel-Connected SiC MOSFETs Using Single-Input Dual-Output Digital Gate Driver IC","authors":"Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, T. Sakurai, Shinichiro Hayashi, K. Wada, I. Omura, M. Takamiya","doi":"10.1109/APEC43599.2022.9773623","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773623","url":null,"abstract":"A single-input, dual-output (SIDO) digital gate driver (DGD) IC, integrating two 6-bit DGDs, two current sensors, and a controller, is proposed to equalize the drain current (ID) variation of two parallel-connected SiC MOSFETs. The DC and surge components of ID of each MOSFET are equalized by digitally controlling the gate voltage amplitude and the gate current at turn-on, respectively. In the double pulse test at 300 V and 40 A using two parallel SiC MOSFETs with different threshold voltages of 0.5 V, the proposed SIDO DGD IC reduces the differences in the DC and surge components of ID of the two MOSFETs from 2.6 A to 0.13 A by 95 % and from 1.9 A to 0.32 A by 83 %, respectively. The automatic equalization of the DC components of ID of the two MOSFETs using SIDO DGD IC is also successfully demonstrated.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127782896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Temperature Dependent Characterization-based Design Optimization of a DC-DC Converter for High-Temperature Applications","authors":"Saikat Dey, Ayan Mallik, N. Goldsman, Z. Dilli","doi":"10.1109/APEC43599.2022.9773769","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773769","url":null,"abstract":"This paper demonstrates the design procedure of a wide voltage gain non-inverting buck-boost converter (NIBB) for high temperature (>150°C) application utilizing the bare die Silicon Carbide (SiC) technology. This work evaluates the ability of SiC bare dies for high temperature (>150°C) power electronics. The selection of the passive components in the power stage such as inductor and capacitors are performed by evaluating a temperature dependent characterization of their performance metrices such as permeability, inductance, leakage current and capacitance. To minimize the temperature rise of the SiC MOSFETs under the full load operation, a quantitative design optimization is performed on the inductance value while accounting for switching and conduction losses and checking for full soft-switching constraints to attain the global minima in total power loss at the switches. A 100W converter prototype is fabricated and tested that converts the input side battery voltage levels of 28V, 120V, and 160V to a configurable output voltage from 30V to 48V, used as a standard for space missions. The experimental result shows a peak conversion efficiency of 91.3% at 200°C ambient temperature. The average full load efficiency of 88.2% at maximum ambient operating temperature validates the proposed design optimization procedure and also makes the SiC bare die technology a suitable candidate for this high temperature application.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128146035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An Integrated On-Board Charger and Auxiliary Power Module for Electric Vehicles","authors":"Ioannis Kougioulis, P. Wheeler, Md. Rishad Ahmed","doi":"10.1109/APEC43599.2022.9773777","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773777","url":null,"abstract":"Integration of high-voltage (HV) on-board battery charger (OBC) and low-voltage (LV) auxiliary power module (APM) can provide significant improvement in the overall weight, size, and efficiency of electric vehicle powertrains. This paper proposes an optimized isolated triple-active bridge (TAB) converter to integrate the functions of OBC and APM in a single converter. The proposed converter has a simple structure and is capable of charging both HV (400V) and LV (12V) batteries simultaneously. Furthermore, a conduction loss-minimization strategy is proposed by utilizing the converter's five degrees of freedom (DOF), aiming to improve the efficiency of the converter by reducing the RMS current in the LV bridge. Wide variations of HV and LV battery voltages are considered. Although soft-switching operation is lost under certain conditions with the conduction-loss minimization scheme, the total power loss of the converter can be reduced by 50%. Simulation results of a converter capable of delivering 3.3kW and 1.6kW simultaneously to the HV and LV battery, respectively, proved the theoretical analysis. 3D Finite Element simulations demonstrated the increased power density of the proposed integrated converter.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"330 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121839809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Radiated Noise Direct Quantification on SiC MOSFET Half-Bridge using Extended Double Pulse Test","authors":"T. Tadakuma, Yuki Matsutaka, M. Rogers, M. Joko","doi":"10.1109/APEC43599.2022.9773528","DOIUrl":"https://doi.org/10.1109/APEC43599.2022.9773528","url":null,"abstract":"Improving power device characteristics is essential for advancing power electronics technology. The use of WBG devices has increased in the past decade because application of low-loss devices is vital for effective use of energy resources. The use of WBG devices means faster switching operations which often increases radiated noise, but it is still necessary to comply with EMI standards of the end product. Therefore, power electronics products must be optimized while also considering noise. For efficient design, it is desirable to quantify the level of radiated noise generation at the earliest possible stage. But, noise is often only estimated from the voltage and current waveforms obtained by double pulse testing. Hence, this article proposes the idea of an extended double pulse test that enables the current dependency of radiated noise to be included in the conventional switching characteristics of a SiC MOSFET half-bridge. This idea will contribute to rapid prototyping of power devices and equipment by performing a double pulse test in an anechoic chamber to grasp the timing of radiated noise generation and quantify the magnitude.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121802151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}