Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, T. Sakurai, Shinichiro Hayashi, K. Wada, I. Omura, M. Takamiya
{"title":"用单输入双输出数字栅极驱动IC均衡两个并联SiC mosfet漏极直流和浪涌分量","authors":"Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, T. Sakurai, Shinichiro Hayashi, K. Wada, I. Omura, M. Takamiya","doi":"10.1109/APEC43599.2022.9773623","DOIUrl":null,"url":null,"abstract":"A single-input, dual-output (SIDO) digital gate driver (DGD) IC, integrating two 6-bit DGDs, two current sensors, and a controller, is proposed to equalize the drain current (ID) variation of two parallel-connected SiC MOSFETs. The DC and surge components of ID of each MOSFET are equalized by digitally controlling the gate voltage amplitude and the gate current at turn-on, respectively. In the double pulse test at 300 V and 40 A using two parallel SiC MOSFETs with different threshold voltages of 0.5 V, the proposed SIDO DGD IC reduces the differences in the DC and surge components of ID of the two MOSFETs from 2.6 A to 0.13 A by 95 % and from 1.9 A to 0.32 A by 83 %, respectively. The automatic equalization of the DC components of ID of the two MOSFETs using SIDO DGD IC is also successfully demonstrated.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Equalization of DC and Surge Components of Drain Current of Two Parallel-Connected SiC MOSFETs Using Single-Input Dual-Output Digital Gate Driver IC\",\"authors\":\"Kohei Horii, Ryuzo Morikawa, Ryunosuke Katada, Katsuhiro Hata, T. Sakurai, Shinichiro Hayashi, K. Wada, I. Omura, M. Takamiya\",\"doi\":\"10.1109/APEC43599.2022.9773623\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single-input, dual-output (SIDO) digital gate driver (DGD) IC, integrating two 6-bit DGDs, two current sensors, and a controller, is proposed to equalize the drain current (ID) variation of two parallel-connected SiC MOSFETs. The DC and surge components of ID of each MOSFET are equalized by digitally controlling the gate voltage amplitude and the gate current at turn-on, respectively. In the double pulse test at 300 V and 40 A using two parallel SiC MOSFETs with different threshold voltages of 0.5 V, the proposed SIDO DGD IC reduces the differences in the DC and surge components of ID of the two MOSFETs from 2.6 A to 0.13 A by 95 % and from 1.9 A to 0.32 A by 83 %, respectively. The automatic equalization of the DC components of ID of the two MOSFETs using SIDO DGD IC is also successfully demonstrated.\",\"PeriodicalId\":127006,\"journal\":{\"name\":\"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC43599.2022.9773623\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43599.2022.9773623","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Equalization of DC and Surge Components of Drain Current of Two Parallel-Connected SiC MOSFETs Using Single-Input Dual-Output Digital Gate Driver IC
A single-input, dual-output (SIDO) digital gate driver (DGD) IC, integrating two 6-bit DGDs, two current sensors, and a controller, is proposed to equalize the drain current (ID) variation of two parallel-connected SiC MOSFETs. The DC and surge components of ID of each MOSFET are equalized by digitally controlling the gate voltage amplitude and the gate current at turn-on, respectively. In the double pulse test at 300 V and 40 A using two parallel SiC MOSFETs with different threshold voltages of 0.5 V, the proposed SIDO DGD IC reduces the differences in the DC and surge components of ID of the two MOSFETs from 2.6 A to 0.13 A by 95 % and from 1.9 A to 0.32 A by 83 %, respectively. The automatic equalization of the DC components of ID of the two MOSFETs using SIDO DGD IC is also successfully demonstrated.