2010 IEEE 8th Symposium on Application Specific Processors (SASP)最新文献

A novel configuration circuit architecture to speedup reconfiguration and relocation for partially reconfigurable devices 一种新的组态电路结构，可加速部分可重构器件的重配置和重定位

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521140

T. Marconi, J. Hur, K. Bertels, G. Gaydadjiev

引用次数: 8

A processing engine for GPS correlation GPS相关处理引擎

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521149

A. El-Rayis, T. Arslan, A. Erdogan

引用次数: 2

Ultra low energy Domain Specific Instruction-set Processor for on-line surveillance 用于在线监测的超低能量域特定指令集处理器

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521151

D. Novo, A. Kritikakou, P. Raghavan, L. Perre, J. Huisken, F. Catthoor

引用次数: 11

Processor accelerator for AES AES处理器加速器

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521153

R. Lee, Yu-Yuan Chen

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引用次数: 19

Next-generation consumer audio application specific embedded processor 下一代消费类音频应用专用嵌入式处理器

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521155

Ji Kong, Peilin Liu, Xianmin Chen, Jin Wang, Xingguang Pan, Jun Wang, He-D. Xiao, Zhenqi Wei, R. Ying

{"title":"Next-generation consumer audio application specific embedded processor","authors":"Ji Kong, Peilin Liu, Xianmin Chen, Jin Wang, Xingguang Pan, Jun Wang, He-D. Xiao, Zhenqi Wei, R. Ying","doi":"10.1109/SASP.2010.5521155","DOIUrl":"https://doi.org/10.1109/SASP.2010.5521155","url":null,"abstract":"For next-generation audio applications, the dominant trends are much higher sample rate, larger word length and more audio channels for playback audio data. Traditional DSPs or embedded processors are inefficient for such kinds of applications because of their non-specific or limited computing capabilities as well as the on-chip memory architectures. In this paper, an embedded audio processor aiming at next-generation audio applications has been proposed. The audio specific instruction set architecture is based on the analysis of the requirements for next-generation audio processing. Besides, a novel tightly coupled audio memory has been proposed to support extremely high audio data throughputs and flexible audio data transfers with main memories. To evaluate the performance of the proposed audio processor, a set of benchmarks have been used based on the analysis of next-generation audio applications. The implementation and evaluation results lead to the conclusion that the proposed audio processor is of outstanding efficiency and cost-effectiveness for next-generation audio applications.","PeriodicalId":119893,"journal":{"name":"2010 IEEE 8th Symposium on Application Specific Processors (SASP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130666260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Minimizing write activities to non-volatile memory via scheduling and recomputation 通过调度和重新计算最小化对非易失性内存的写入活动

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521139

J. Hu, C. Xue, Wei-Che Tseng, Qingfeng Zhuge, E. Sha

{"title":"Minimizing write activities to non-volatile memory via scheduling and recomputation","authors":"J. Hu, C. Xue, Wei-Che Tseng, Qingfeng Zhuge, E. Sha","doi":"10.1109/SASP.2010.5521139","DOIUrl":"https://doi.org/10.1109/SASP.2010.5521139","url":null,"abstract":"Non-volatile memories, such as flash memory, Phase Change Memory (PCM), and Magnetic Random Access Memory (MRAM), have many desirable characteristics for embedded DSP systems to employ them as main memory. These characteristics include low-cost, shock-resistivity, non-volatility, power-economy and high density. However, there are two common challenges we need to answer before we can apply non-volatile memory as main memory practically. First, non-volatile memory has limited write/erase cycles compared to DRAM. Second, a write operation is slower than a read operation on non-volatile memory. These two challenges can be answered by reducing the number of write activities on non-volatile main memory. In this paper, we propose two optimization techniques, write-aware scheduling and recomputation, to minimize write activities on non-volatile memory. With the proposed techniques, we can both speed up the completion time of programs and extend non-volatile memory's lifetime. The experimental results show that the proposed techniques can reduce the number of write activities on non-volatile memory by 55.71% on average. Thus, the lifetime of non-volatile memory is extend to 2.5 times as long as before on average. The completion time of programs can be reduced by 55.32% on systems with NOR flash memory and by 40.69% on systems with NAND flash memory on average.","PeriodicalId":119893,"journal":{"name":"2010 IEEE 8th Symposium on Application Specific Processors (SASP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113942734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 48

Early performance-cost estimation of application-specific data path pipelining 特定于应用程序的数据路径管道的早期性能成本估计

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521136

Jelena Trajkovic, D. Gajski

引用次数: 0

Efficient template matching with variable size templates in CUDA 有效的模板匹配与可变大小的模板在CUDA

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521142

Nicholas Moore, M. Leeser, L. King

引用次数: 1

An RTOS in hardware for energy efficient software-based TCP/IP processing 基于软件的高效TCP/IP处理的硬件RTOS

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521147

Naotaka Maruyama, T. Ishihara, H. Yasuura

引用次数: 25

Reconfigurable custom functional unit generation and exploitation in multiple-issue processors 多问题处理器中可重构自定义功能单元的生成和开发

2010 IEEE 8th Symposium on Application Specific Processors (SASP) Pub Date : 2010-06-13 DOI: 10.1109/SASP.2010.5521135

I-Wei Wu, J. Shann, C. Chung

引用次数: 0