Reconfigurable custom functional unit generation and exploitation in multiple-issue processors

Recently, next-generation digital entertainment and mobile communication devices are driving the demand for high-performance processing solutions. In order to achieve this demand, multiple-issue processors such as very long instruction word (VLIW) architecture augmented with a reconfigurable hardware accelerator have been proposed in many papers. The reconfigurable hardware accelerator is usually realized by multiple functional units (FUs) organized in matrix fashion, called reconfigurable customized functional unit (RCFU). Since a multiple-issue processor can execute several data-independent operations simultaneously, executing operations on both of the RCFU and FUs of the base processor concurrently is reasonable and is also beneficial for improving the hardware resource utilization and the execution performance. Because of this observation, we propose an RCFU generation algorithm and an RCFU exploitation algorithm in this paper. In our experiment, 43% of execution performance improvement can be further achieved averagely compared with the previous works.1