ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design最新文献_第6页

Robust Multiple-Phase Switched-Capacitor DC-DC, Converter with Digital Interleaving Regulation Scheme 鲁棒多相开关电容DC-DC变换器与数字交错调节方案

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165671

D. Ma

引用次数: 14

A Novel Dynamic Power Cutoff Technique (DPCT) for Active Leakage Reduction in Deep Submicron CMOS Circuits 一种新颖的动态功率截止技术(DPCT)用于深亚微米CMOS电路的有源泄漏降低

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165627

Baozhen Yu, M. Bushnell

{"title":"A Novel Dynamic Power Cutoff Technique (DPCT) for Active Leakage Reduction in Deep Submicron CMOS Circuits","authors":"Baozhen Yu, M. Bushnell","doi":"10.1145/1165573.1165627","DOIUrl":"https://doi.org/10.1145/1165573.1165627","url":null,"abstract":"Due to the exponential increase in subthreshold leakage and gate leakage with technology scaling, leakage power is becoming a major fraction of total VLSI chip power in active mode. We present a novel active leakage power reduction technique, called the dynamic power cutoff technique (DPCT). First, the switching window for each gate, during which a gate makes its transitions, is identified by static timing analysis. Then, the circuit is optimally partitioned into different groups based on the minimal switching window (MSW) of each gate. Finally, power cutoff transistors are inserted into each group to control the power connections of that group. Each group is turned on only long enough for a wavefront of changing signals to propagate through that group. Since each gate is only turned on during a small timing window within each clock cycle, this significantly reduces active leakage power. This technique can also save standby leakage and dynamic power. Results on ISCAS'85 benchmark circuits modeled using 70 nm Berkeley predictive models (Cao et al., 2000) show up to 90% active leakage, 99% standby leakage, 54% dynamic power, and 72% total power savings","PeriodicalId":119229,"journal":{"name":"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design","volume":"30 15","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113942679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 18

Modelling Macromodules for High-Level Dynamic Power Estimation of FPGA-based Digital Designs 基于fpga的数字设计高级动态功率估计的宏模块建模

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165609

A. Reimer, Arne Schulz, W. Nebel

引用次数: 20

Design and Power Management of Energy Harvesting Embedded Systems 能量收集嵌入式系统的设计与电源管理

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165663

V. Raghunathan, P. Chou

{"title":"Design and Power Management of Energy Harvesting Embedded Systems","authors":"V. Raghunathan, P. Chou","doi":"10.1145/1165573.1165663","DOIUrl":"https://doi.org/10.1145/1165573.1165663","url":null,"abstract":"Harvesting energy from the environment is a desirable and increasingly important capability in several emerging applications of embedded systems such as sensor networks, biomedical implants, etc. While energy harvesting has the potential to enable near-perpetual system operation, designing an efficient energy harvesting system that actually realizes this potential requires an in-depth understanding of several complex tradeoffs. These tradeoffs arise due to the interaction of numerous factors such as the characteristics of the harvesting transducers, chemistry and capacity of the batteries used (if any), power supply requirements and power management features of the embedded system, application behavior, etc. This paper surveys the various issues and tradeoffs involved in designing and operating energy harvesting embedded systems. System design techniques are described that target high conversion and storage efficiency by extracting the most energy from the environment and making it maximally available for consumption. Harvesting aware power management techniques are also described, which reconcile the very different spatio-temporal characteristics of energy availability and energy usage within a system and across a network","PeriodicalId":119229,"journal":{"name":"ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122180172","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 120

Logic Circuits Operating in Subthreshold Voltages 在亚阈值电压下工作的逻辑电路

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165604

J. Nyathi, B. Bero

引用次数: 20

Dynamic Thermal Management for MPEG-2 Decoding MPEG-2解码的动态热管理

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165647

Wonbok Lee, Kimish Patel, Massoud Pedram

引用次数: 28

Power Efficiency for Variation-Tolerant Multicore Processors 可变容错多核处理器的功率效率

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165645

J. Donald, M. Martonosi

引用次数: 71

A 0.5-V FD-SOI Twin-Cell DRAM with Offset-Free Dynamic-VT Sense Amplifiers 带无偏置动态vt检测放大器的0.5 v FD-SOI双单元DRAM

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165602

R. Takemura, K. Itoh, T. Sekiguchi

引用次数: 7

A New Technique for Jointly Optimizing Gate Sizing and Supply Voltage in Ultra-Low Energy Circuits 超低能量电路中栅极尺寸和电源电压联合优化的新技术

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165653

S. Hanson, D. Sylvester, D. Blaauw

引用次数: 8

Behavioral Modeling of Opamp Gain and Dynamic Effects for Power Optimization of Delta-Sigma Modulators and Pipelined ADCs δ - sigma调制器和流水线adc功率优化的运放增益和动态影响行为建模

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI: 10.1145/1165573.1165651

A. Hamoui, T. Alhajj, M. Taherzadeh‐Sani

引用次数: 28