基于fpga的数字设计高级动态功率估计的宏模块建模

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design Pub Date : 2006-10-04 DOI:10.1145/1165573.1165609

A. Reimer, Arne Schulz, W. Nebel

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引用次数: 20

摘要

我们提出了一种新的宏模块功率模型库，可用于FPGA技术的高级动态功率估计。该方法采用了先前发布的针对ASIC技术的高级评估流程。由于不同的架构(ASIC与FPGA)，所提出的方法建立在模型生成阶段的迭代优化步骤上

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Modelling Macromodules for High-Level Dynamic Power Estimation of FPGA-based Digital Designs

We present our approach for a new macromodule power model library which can be used in high-level dynamic power estimation for FPGA technologies. The approach adapts a previously published high-level estimation flow for ASIC technologies. Due to the different architectures (ASIC vs. FPGA) the presented approach builds on an iterative optimization step during the model generation phase

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ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design

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