Electronics Letters最新文献

{"title":"Balancing Robustness and Efficiency in Embedded DNNs Through Activation Function Selection","authors":"Jon Gutiérrez-Zaballa,&nbsp;Koldo Basterretxea,&nbsp;Javier Echanobe","doi":"10.1049/ell2.70210","DOIUrl":"https://doi.org/10.1049/ell2.70210","url":null,"abstract":"<p>Machine learning-based embedded systems for safety-critical applications, such as aerospace and autonomous driving, must be robust to perturbations caused by soft errors. As transistor geometries shrink and voltages decrease, modern electronic devices become more susceptible to background radiation, increasing the concern about failures produced by soft errors. The resilience of deep neural networks (DNNs) to these errors depends not only on target device technology but also on model structure and the numerical representation and arithmetic precision of their parameters. Compression techniques like pruning and quantisation, used to reduce memory footprint and computational complexity, alter both model structure and representation, affecting soft error robustness. In this regard, although often overlooked, the choice of activation functions (AFs) impacts not only accuracy and trainability but also compressibility and error resilience. This paper explores the use of bounded AFs to enhance robustness against parameter perturbations, while evaluating their effects on model accuracy, compressibility, and computational load with a technology-agnostic approach. We focus on encoder–decoder convolutional models developed for semantic segmentation of hyperspectral images with application to autonomous driving systems. Experiments are conducted on an AMD-Xilinx's KV260 SoM.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70210","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143741693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Framework for Online Estimation of High Frequency Converter Circuit Parameters","authors":"Nicholas Green,&nbsp;Mohammed Agamy","doi":"10.1049/ell2.70230","DOIUrl":"https://doi.org/10.1049/ell2.70230","url":null,"abstract":"<p>In this paper a parameter estimation method of high frequency switching power converters is proposed. Parameters are estimated through measurement of basic circuit voltage and current quantities and using simple feed forward neural networks to establish correlations between circuit parameter variations and general converter performance. This allows the estimation of internal semiconductor device or passive component parameters that would be challenging to measure directly. This approach serves as a promising enabler for power converter digital twins and for converter health monitoring. The proposed framework is developed and verified for an LLC resonant converter. Parameter predictions achieved mean absolute errors below 4.12% and an average MAE of 1.57% for all parameters.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70230","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Enhancing Electric Wheelchair Safety via Battery State of Charge Estimation With PCC–NSSR–LSTM Method","authors":"Panpan Hu,&nbsp;Chi-Wing Tsang,&nbsp;Xiao-Ying Lu,&nbsp;Chun Yin Li,&nbsp;Chi Chung Lee","doi":"10.1049/ell2.70228","DOIUrl":"https://doi.org/10.1049/ell2.70228","url":null,"abstract":"<p>This study explores a novel algorithm created to predict the state of charge (SOC) of batteries in electric wheelchairs (EWs) to improve EW safety by adjusting SOC thresholds and reducing consumer range anxiety. It involves collecting experimental data from lithium iron phosphate (LFP) battery cells over 1500 cycles at 25°C, encompassing various parameters. With the Pearson correlation coefficient (PCC), a select set of key parameters including voltage, temperature, dQ/dV (capacity increase to voltage increase ratio) are chosen as inputs for non-linear state space reconstruction long short-term memory (NSSR-LSTM) neural networks, facilitating precise SOC predictions. The study showcases the precision of SOC predictions by revealing outcomes for different cycles, such as 900, 1000 and 1100. In addition to EWs, the proposed PCC–NSSR–LSTM method is also applicable to other mobility devices, including electric bicycles, golf carts and similar vehicles.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70228","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Switchable Bulk Acoustic Resonator Based on AlN/Al0.7Sc0.3N Films","authors":"Jinghong Lu,&nbsp;Chongyang Huo,&nbsp;Xuanqi Huang,&nbsp;Weimin Li,&nbsp;Zhiqiang Mu,&nbsp;Wenjie Yu","doi":"10.1049/ell2.70241","DOIUrl":"https://doi.org/10.1049/ell2.70241","url":null,"abstract":"<p>Tuneable filters are essential for the development of the reconfigurable RF modules. This work demonstrates a switchable bulk acoustic wave resonator utilizing a double-layer structure of piezoelectric AlN and ferroelectric Al_0.7Sc_0.3N films. By applying a DC bias, the resonator achieves frequency switching through the control of the polarization in the Al_0.7Sc_0.3N layer. The resonator exhibits dual-mode operation, with tuneable resonant frequencies between 6.80 and 16.73 GHz, while maintaining considerable electromechanical coupling efficiency at high frequencies. These characteristics reveal great potential of this device for the development of reconfigurable acoustic filters and RF modules in advanced wireless communication systems.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70241","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143735508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low Power CMOS Stochastic Bit Based Ising Machine and Its Application to Graph Coloring Problem","authors":"Honggu Kim,&nbsp;Dongjun Son,&nbsp;Yerim An,&nbsp;Yong Shim","doi":"10.1049/ell2.70236","DOIUrl":"https://doi.org/10.1049/ell2.70236","url":null,"abstract":"<p>The Ising spin model is an efficient method for solving combinatorial optimization problems (COPs) but faces challenges in conventional Von-Neumann architectures due to high computational costs, especially with the growing data volume in the IoT era. To address this problem, we proposed low power CMOS stochastic bit based Ising machine to efficiently compute COPs. By adopting compute-in-memory (CIM) approach for parallel spin computation, we achieved energy efficient spin computing. Furthermore, we harnessed the inherent randomness of CMOS stochastic bit to prevent Ising computing process from being stuck into local minima, effectively mitigating the power penalty associated with the random number generators (RNGs) in the conventional CMOS based Ising machines. We demonstrated the feasibility of our design by solving NP-complete graph coloring problem with four vertices and three colors using TSMC 65 nm GP process. Moreover, the proposed CMOS stochastic bit based spin unit consumes the lowest power/spin among the state-of-the-art Ising machine researches, with power/spin of 1.07 <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mi>μ</mi>\u0000 <mi>W</mi>\u0000 </mrow>\u0000 <annotation>$mu{rm W}$</annotation>\u0000 </semantics></math> and energy/spin of 107 fJ.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70236","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 26.5–29.5 GHz 256-Element Dual-Polarized Integrated Phased Array With 61-dBm EIRP and 400-MHz 64-QAM Modulation","authors":"Huiqi Liu,&nbsp;Dixian Zhao","doi":"10.1049/ell2.70238","DOIUrl":"https://doi.org/10.1049/ell2.70238","url":null,"abstract":"<p>A dual-polarized 256-element integrated phased-array antenna is presented, with an operating frequency range covering the 5G NR N257 band (i.e., 26.5–29.5 GHz). By adopting an integrated phased array technology with cost-effective fabrication, multifunctional circuits can be implemented in high-density configurations, thereby reducing system footprint without sacrificing performance. A design methodology for the dual-polarized antennas with high isolation is employed to enhance the cross-polarization suppression. The proposed phased array supports scanning angles of <span></span><math>\u0000 <semantics>\u0000 <mo>±</mo>\u0000 <annotation>$pm$</annotation>\u0000 </semantics></math><span></span><math>\u0000 <semantics>\u0000 <msup>\u0000 <mn>40</mn>\u0000 <mo>∘</mo>\u0000 </msup>\u0000 <annotation>$40^circ$</annotation>\u0000 </semantics></math> and <span></span><math>\u0000 <semantics>\u0000 <mo>±</mo>\u0000 <annotation>$pm$</annotation>\u0000 </semantics></math><span></span><math>\u0000 <semantics>\u0000 <msup>\u0000 <mn>60</mn>\u0000 <mo>∘</mo>\u0000 </msup>\u0000 <annotation>$60^circ$</annotation>\u0000 </semantics></math> in the azimuth and elevation planes, respectively. The typical effective isotropic radiated power (EIRP) of the dual-polarized antenna is greater than 61 dBm with the 5G NR 400-MHz 64-QAM modulation (EVM <span></span><math>\u0000 <semantics>\u0000 <mo>&lt;</mo>\u0000 <annotation>$&lt;$</annotation>\u0000 </semantics></math> 5.6<span></span><math>\u0000 <semantics>\u0000 <mo>%</mo>\u0000 <annotation>$%$</annotation>\u0000 </semantics></math>).</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70238","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Wide Range Integer-N PLL With Fast Frequency Settling Techniques for Multi-Standard Applications","authors":"Sangdon Jung,&nbsp;Minsu Park,&nbsp;Jung-Hoon Chun","doi":"10.1049/ell2.70233","DOIUrl":"https://doi.org/10.1049/ell2.70233","url":null,"abstract":"<p>This letter proposes a ring-VCO-based integer-N phase-locked loop (PLL) with a wide frequency output range and fast frequency transitions for multi-standard applications. To reduce power consumption, two key techniques are introduced. First, a VCO gain calibration unit calibrates the variable resistor-based V-to-I converter, ensuring a consistent frequency tuning slop under process, voltage and temperature (PVT) variations. Second, a pulse-swallow divider and timing control unit suppress unnecessary frequency fluctuation and achieve fast phase locking. This design enables PLL to reach the target frequency with 500 ns even under PVT variations. The proposed PLL covers 850 MHz to 3.3 GHz, achieving −107.3 dBc/Hz phase noise at a 10 MHz offset, with 6 mW power consumption at 3.3 GHz and an active area of 0.09 mm².</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70233","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143717225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Adaptive Subarray Partitioning for Large-Scale Phased Arrays Using ISODATA","authors":"Zihong Wu,&nbsp;Peng Wu,&nbsp;Wenxin Liu,&nbsp;Zhaochuan Zhang","doi":"10.1049/ell2.70212","DOIUrl":"https://doi.org/10.1049/ell2.70212","url":null,"abstract":"<p>Phased array antennas, known for their high directivity and low sidelobe levels, are widely used in radar and communication systems. As the array size increases, controlling each element individually becomes increasingly complex and costly. To address this challenge, subarray partitioning is an effective solution. Traditional clustering algorithms, like K-means, require a predefined number of subarrays, limiting flexibility, especially in scenarios with complex geometries or irregular distributions. In contrast, the ISODATA algorithm dynamically adjusts the number of subarrays based on element variance and spatial distribution. This allows ISODATA to adapt to irregular array geometries and complex distributions, leading to more effective sidelobe suppression and beamforming. Additionally, ISODATA incorporates splitting and merging operations, offering greater flexibility in subarray configuration compared to the static K-means. Numerical experiments demonstrate that ISODATA outperforms K-means in terms of sidelobe suppression, beamforming, and partitioning flexibility, making it highly suitable for large-scale phased array applications.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70212","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143707538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"DART3D: Depth-Aware Robust Adversarial Training for Monocular 3D Object Detection","authors":"Xinrui Ju,&nbsp;Xiaoke Shang,&nbsp;Xingyuan Li,&nbsp;Bohua Ren","doi":"10.1049/ell2.70214","DOIUrl":"https://doi.org/10.1049/ell2.70214","url":null,"abstract":"<p>Monocular 3D object detection plays a pivotal role in the field of autonomous driving and numerous deep learning-based methods have made significant breakthroughs in this area. Despite the advancements in detection accuracy and efficiency, these models tend to fail when faced with adversarial attacks, rendering them ineffective. Therefore, bolstering the adversarial robustness of 3D detection models has become a critical issue. To mitigate this issue, we propose a depth-aware robust adversarial training method for monocular 3D object detection, dubbed DART3D. Specifically, we first design an adversarial attack that iteratively degrades the 2D and 3D perception capabilities of 3D object detection models (iterative deterioration of perception), serving as the foundation for our subsequent defense mechanism. In response to this attack, we propose an uncertainty-based residual learning method for adversarial training. Our adversarial training leverages inherent uncertainty to boost robustness against attacks while incorporating depth-aware information enhances resistance to perturbations in both 2D and 3D domains. We conducted extensive experiments on the KITTI 3D dataset, showing that DART3D outperforms direct adversarial training in 3D object detection <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mi>A</mi>\u0000 <msub>\u0000 <mi>P</mi>\u0000 <mrow>\u0000 <mi>R</mi>\u0000 <mn>40</mn>\u0000 </mrow>\u0000 </msub>\u0000 </mrow>\u0000 <annotation>$AP_{R40}$</annotation>\u0000 </semantics></math> for the car category, with improvements of 4.415%, 4.112% and 3.195% in easy, moderate and hard settings, respectively.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70214","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143698787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"ASIC Design of a Canonical Huffman Encoder for Computational Storage Drives","authors":"Yunxin Huang,&nbsp;Aiguo Song,&nbsp;Tao Lu,&nbsp;Yafei Yang","doi":"10.1049/ell2.70224","DOIUrl":"https://doi.org/10.1049/ell2.70224","url":null,"abstract":"<p>Huffman coding is foundational to data compression algorithms. We propose an advanced application-specific integrated circuit (ASIC) design for a canonical Huffman encoder, optimised for high throughput and low power consumption. Our design introduces a high-speed sorting circuit, an efficient Huffman tree canonisation algorithm and an innovative entropy-based compressibility prediction mechanism. Implemented using 12 nm CMOS technology, the proposed solution achieves a remarkable throughput of 4 GB/s and sub-microsecond latency for 4 KB pages, outperforming existing x86 software implementations by nearly two orders of magnitude and surpassing state-of-the-art hardware accelerators. This advancement significantly enhances data processing capabilities in computational storage drives (CSDs), providing a scalable and energy-efficient data compression solution for modern data centres.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70224","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143689893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}