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Simplified State-Trajectory Analysis Method for Dual-Active-Bridge DC-DC Converters 双有源桥式DC-DC变换器的简化状态轨迹分析方法
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-29 DOI: 10.1049/ell2.70267
Ruiqi Ding, Chao Tang, Chuan Sun, Xiaodong Li, Akshay Rathore
{"title":"Simplified State-Trajectory Analysis Method for Dual-Active-Bridge DC-DC Converters","authors":"Ruiqi Ding,&nbsp;Chao Tang,&nbsp;Chuan Sun,&nbsp;Xiaodong Li,&nbsp;Akshay Rathore","doi":"10.1049/ell2.70267","DOIUrl":"https://doi.org/10.1049/ell2.70267","url":null,"abstract":"<p>To facilitate the analysis and design of bidirectional dual-active-bridge (DAB) dc-dc converters, a new and simplified state-trajectory analysis approach is first proposed in this paper, which reveals the effects of terminal voltages on the inductor current in each switching interval. The proposed trajectory can be used to illustrate different steady states, the zero-voltage switching (ZVS) conditions and the transient transition between different steady states. Based on this state-trajectory method, two simple transient modulation strategies are derived naturally for a DAB converter under single-phase-shift control. Results from simulation and experimental tests prove that the obtained transient modulation strategies are able to achieve fast and overshoot-free transition from one load level to another without introducing dc bias in the inductor current.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70267","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Optimised GRAND Based on Cyclic Codebook 基于循环码本的优化GRAND
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-29 DOI: 10.1049/ell2.70271
Xiaona Xue, Zhigang Zhou, Jiangong Ni, Gang Chen
{"title":"An Optimised GRAND Based on Cyclic Codebook","authors":"Xiaona Xue,&nbsp;Zhigang Zhou,&nbsp;Jiangong Ni,&nbsp;Gang Chen","doi":"10.1049/ell2.70271","DOIUrl":"https://doi.org/10.1049/ell2.70271","url":null,"abstract":"<p>The cyclic codebook-GRAND (CC-GRAND) algorithm was proposed to address the issue of significant increases in storage capacity with code length in the GRAND algorithm, which uses a cyclic generation codebook to reduce codebook capacity. The simulation results show that the algorithm achieves the same bit error rate (BER) performance as the maximum likelihood decoding algorithm, while effectively reducing the codebook capacity.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70271","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A K-Band 4-Channel Hybrid-Packaged Phased-Array Receiver With 1.6-dB NF and 60-dB Transmit Rejection 一种具有1.6 db NF和60db发射抑制的k波段4通道混合封装相控阵接收机
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-28 DOI: 10.1049/ell2.70257
Bai Song, Yong Fan
{"title":"A K-Band 4-Channel Hybrid-Packaged Phased-Array Receiver With 1.6-dB NF and 60-dB Transmit Rejection","authors":"Bai Song,&nbsp;Yong Fan","doi":"10.1049/ell2.70257","DOIUrl":"https://doi.org/10.1049/ell2.70257","url":null,"abstract":"<p>This letter presents a K-band 4-channel hybrid-packaged phased-array receiver IC for satellite communication (SATCOM). The design utilizes wafer-level chip-scale packaging (WLCSP) technology to integrate four GaAs LNAs and a 4-channel CMOS beamformer into a single package. The GaAs IC features a 2-stage self-biased LNA and a 5th-order band-stop filter, achieving a low cascaded noise figure (NF) and high transmit (TX) rejection. The CMOS beamformer incorporates a novel direct current-mode combination technique based on a parallel switch array attenuator within the passive vector-modulated phase shifter (VMPS), reducing size and phase error. A two-stage digitally controlled current-steering variable gain amplifier (VGA) is optimized to provide a wide gain control range and high resolution. Operating across the SATCOM band of 17.7–21.2 GHz, the proposed phased-array receiver achieves a 360° phase-shifting range with 6-bit resolution and a 15.5-dB gain tuning range with 0.5-dB steps. Measured results show root mean square (rms) phase and amplitude errors of 1.3°–2° and 0.18–0.25 dB, respectively. Each channel demonstrates a state-of-the-art NF of 1.6 dB, a single-path gain of 30 dB, TX rejection of 60 dB, and a TX-band input-referred 1-dB gain compression point (IP1dB) of -10 dBm, while consuming only 46.8 mW of DC power per channel.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70257","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Information-Theoretically Private Federated Submodel Learning With Byzantine Local Updates 具有拜占庭局部更新的信息论私有联邦子模型学习
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-28 DOI: 10.1049/ell2.70268
Minchul Kim, Sangwoo Hong
{"title":"Information-Theoretically Private Federated Submodel Learning With Byzantine Local Updates","authors":"Minchul Kim,&nbsp;Sangwoo Hong","doi":"10.1049/ell2.70268","DOIUrl":"https://doi.org/10.1049/ell2.70268","url":null,"abstract":"<p>In federated submodel learning (FSL), the aggregator has multiple submodels to train, and each local machine chooses a specific submodel to update with its local training data. Therefore, a local machine may want to conceal which submodel was accessed by the local machine against the aggregator, as well as its local training data. However, Byzantine local updates during the upload phase pose a fundamental threat, as a single adversary can corrupt multiple submodels simultaneously. In this paper, an information-theoretically private FSL scheme for protecting the multiple submodels stored in aggregators against the Byzantine local updates of the upload phase is considered, which has not been considered in previous works.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70268","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 5 GS/s Highly Linear Voltage-Scalable Voltage-to-Time Converter for Time Domain ADCs 一种用于时域adc的5gs /s高线性电压可扩展电压-时间转换器
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-28 DOI: 10.1049/ell2.70239
Qiuyue Zhang, Xuqiang Zheng, Zhi Jin
{"title":"A 5 GS/s Highly Linear Voltage-Scalable Voltage-to-Time Converter for Time Domain ADCs","authors":"Qiuyue Zhang,&nbsp;Xuqiang Zheng,&nbsp;Zhi Jin","doi":"10.1049/ell2.70239","DOIUrl":"https://doi.org/10.1049/ell2.70239","url":null,"abstract":"<p>A novel 5 GS/s highly linear voltage-scalable voltage-to-time converter (VTC) has been presented for the time-domain (TD) ADCs. The proposed VTC employs an innovative sample-and-hold (S/H) network to scale the sampled voltage, extending the input voltage range while overcoming the trade-off between linearity and input range that has been a limitation of conventional VTCs. In addition, this work introduces an enhanced bootstrapped switch to improve linearity when handling high-frequency input signals. The proposed VTC is designed in the 28 nm CMOS process, occupying an area of 972 <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mi>μ</mi>\u0000 <msup>\u0000 <mi>m</mi>\u0000 <mn>2</mn>\u0000 </msup>\u0000 </mrow>\u0000 <annotation>$mu{rm m}^2$</annotation>\u0000 </semantics></math>. Post-layout simulation results demonstrate that, with an input voltage of 1.4 <span></span><math>\u0000 <semantics>\u0000 <msub>\u0000 <mi>V</mi>\u0000 <mrow>\u0000 <mtext>pp</mtext>\u0000 <mo>,</mo>\u0000 <mtext>diff</mtext>\u0000 </mrow>\u0000 </msub>\u0000 <annotation>${rm V}_{text{pp}, text{diff}}$</annotation>\u0000 </semantics></math>, the VTC achieves a total harmonic distortion (THD) of −62.9 dB and a spurious-free dynamic range (SFDR) of 65.5 dB for Nyquist input, while consuming only 1.92 mW of power.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70239","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ultra-Low Noise Figure Ka-Band MMIC LNA With Graded-Channel GaN HEMTs 带梯度通道GaN hemt的超低噪声图ka波段MMIC LNA
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-27 DOI: 10.1049/ell2.70258
Joe Tai, Joel Wong, Jeong-Sun Moon
{"title":"Ultra-Low Noise Figure Ka-Band MMIC LNA With Graded-Channel GaN HEMTs","authors":"Joe Tai,&nbsp;Joel Wong,&nbsp;Jeong-Sun Moon","doi":"10.1049/ell2.70258","DOIUrl":"https://doi.org/10.1049/ell2.70258","url":null,"abstract":"<p>We report broadband (20 GHz - 40 GHz) low-noise amplifiers in a cascode topology using graded-channel GaN HEMTs, resulting in an excellent NF figure down to 1 dB with 15 dB gain.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70258","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143877792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient Signal Processing for Frequency-Agile Radar With Limited Computational Resources 有限计算资源下频率捷变雷达的高效信号处理
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-27 DOI: 10.1049/ell2.70270
Zexi Wei, Dinghong Lu, Zhe Cao
{"title":"Efficient Signal Processing for Frequency-Agile Radar With Limited Computational Resources","authors":"Zexi Wei,&nbsp;Dinghong Lu,&nbsp;Zhe Cao","doi":"10.1049/ell2.70270","DOIUrl":"https://doi.org/10.1049/ell2.70270","url":null,"abstract":"<p>Frequency-agile radar provides strong anti-jamming capabilities, but its performance is limited by the coupled phase terms arising from target range, velocity, and carrier frequency during coherent accumulation. Existing methods often require substantial computational loads, making them impractical for resource-constrained platforms. This letter proposes a fast high-resolution range profile (HRRP) generation method that eliminates velocity compensation. The key lies in a specially designed waveform that transforms the velocity-related phase into linear phase components. Through the conjugate multiplication of echoes, the linear velocity-related phase is converted into a constant term that enables direct HRRP generation via FFT. Simulations show that the method maintains imaging quality while achieving higher computational efficiency, providing a feasible solution for resource-limited radar platforms.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70270","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143877791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
VLSI Design of LSTM-Based ECG Classification for Continuous Cardiac Monitoring on Wearable Devices 基于lstm的可穿戴设备连续心脏监测心电分类的VLSI设计
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-25 DOI: 10.1049/ell2.70269
Nousheen Akhtar, Jiancun Fan, Abdul Rehman Buzdar, Muaz Ahmed, Ali Raza
{"title":"VLSI Design of LSTM-Based ECG Classification for Continuous Cardiac Monitoring on Wearable Devices","authors":"Nousheen Akhtar,&nbsp;Jiancun Fan,&nbsp;Abdul Rehman Buzdar,&nbsp;Muaz Ahmed,&nbsp;Ali Raza","doi":"10.1049/ell2.70269","DOIUrl":"https://doi.org/10.1049/ell2.70269","url":null,"abstract":"<p>A portable and efficient electrocardiogram (ECG) classification system is essential for continuous cardiac monitoring in wearable healthcare devices. This paper presents a highly efficient very large scale integration architecture optimized for real-time ECG classification. The proposed system integrates a feature extraction module that utilizes a four-level daubechies discret wavelet transform and a classification module comprising multiple long-short-term memory recurrent neural networks, fully connected layers, and a multilayer perceptron. The design achieves a classification accuracy of <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>99</mn>\u0000 <mo>%</mo>\u0000 </mrow>\u0000 <annotation>$99%$</annotation>\u0000 </semantics></math>. The hardware architecture demonstrates low resource utilization and operates at a power consumption of 41 mW with a clock frequency of 54 MHz, ensuring real-time classification. The presented design is verified on a Xilinx field-programmable gate array and tested using the publicly available ECG data set. Compared to state-of-the-art implementations, our approach achieves a superior balance between classification accuracy, power efficiency, and hardware resource optimization, making it suitable for wearable cardiac monitoring applications.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70269","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143871806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Centre-Fed Low Side Lobe Circularly Polarised Phased Array Using Spiral Sequential Rotation Technique 采用螺旋顺序旋转技术的中心馈电低旁瓣圆极化相控阵
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-25 DOI: 10.1049/ell2.70259
Yuanming Xiao, Lianxing He, Zhanyu Kang, Xiaoli Wei
{"title":"A Centre-Fed Low Side Lobe Circularly Polarised Phased Array Using Spiral Sequential Rotation Technique","authors":"Yuanming Xiao,&nbsp;Lianxing He,&nbsp;Zhanyu Kang,&nbsp;Xiaoli Wei","doi":"10.1049/ell2.70259","DOIUrl":"https://doi.org/10.1049/ell2.70259","url":null,"abstract":"<p>This letter presents a novel spiral sequential rotation (SSR) technique for the phased array with a centre-fed element to achieve a low cross-polarisation level and good side lobe suppression.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70259","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143871805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Deep Subspace Clustering Preserving Distribution for Hyperspectral Images 高光谱图像的深子空间聚类保持分布
IF 0.7 4区 工程技术
Electronics Letters Pub Date : 2025-04-24 DOI: 10.1049/ell2.70262
Shujun Liu, Huajun Wang
{"title":"Deep Subspace Clustering Preserving Distribution for Hyperspectral Images","authors":"Shujun Liu,&nbsp;Huajun Wang","doi":"10.1049/ell2.70262","DOIUrl":"https://doi.org/10.1049/ell2.70262","url":null,"abstract":"<p>Hyperspectral images usually lie on low-dimensional nonlinear manifolds, leading to a challenging clustering task. Deep subspace clustering–based methods have been successful in this task by converting features to linear embedding using an auto-encoder with <span></span><math>\u0000 <semantics>\u0000 <msub>\u0000 <mi>ℓ</mi>\u0000 <mn>2</mn>\u0000 </msub>\u0000 <annotation>$ell _2$</annotation>\u0000 </semantics></math> norm. In this setting, the embedding of the auto-encoder just learns the implicit geometric structure of original samples and loses its distribution. However, the sample distribution alignment is a generalisation of sample alignment. To remedy these issues, in this article, we propose a promising method, named DSCOT, for improving subspace clustering. Specifically, we measure the reconstruction error of the auto-encoder leveraging optimal transport distance that explicitly embeds geometric distance between samples and preserves embedding distribution in observation space. It results in more appropriate embedding for subspace clustering. Several experiments on three widely used databases show that the proposed method is superior to most state-of-the-art methods.</p>","PeriodicalId":11556,"journal":{"name":"Electronics Letters","volume":"61 1","pages":""},"PeriodicalIF":0.7,"publicationDate":"2025-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/ell2.70262","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143865955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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