P. Mensch, S. Karg, B. Gotsmann, P. Kanungo, V. Schmidt, V. Troncale, H. Schmid, H. Riel
{"title":"Electrical and thermoelectrical properties of gated InAs nanowires","authors":"P. Mensch, S. Karg, B. Gotsmann, P. Kanungo, V. Schmidt, V. Troncale, H. Schmid, H. Riel","doi":"10.1109/ESSDERC.2013.6818866","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818866","url":null,"abstract":"We have investigated the electrical and thermoelectrical properties of 30-nm-thick InAs nanowires in a temperature range between T = 200 K and T = 350 K. Devices were fabricated that allow the measurement of the conductivity and Seebeck coefficient upon the application of a gate voltage. The carrier concentration in the NWs could be varied by two orders of magnitude. The dependence of the Seebeck coefficients measured on the carrier concentration is similar to bulk InAs. A temperature-dependent mobility of IL = 1200-1400 cm 2/Vs of these unpassivated NWs could be determined from both the transistor characteristics and Seebeck coefficient measurements.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132570823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Duesberg, Hye-Young Kim, Kangho Lee, N. McEvoy, S. Winters, C. Yim
{"title":"Investigation of carbon-silicon schottky diodes and their use as chemical sensors","authors":"G. Duesberg, Hye-Young Kim, Kangho Lee, N. McEvoy, S. Winters, C. Yim","doi":"10.1109/ESSDERC.2013.6818825","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818825","url":null,"abstract":"Schottky barrier diodes (SBDs) with different carbon materials, namely pyrolytic carbon, glassy carbon and graphene have been investigated. The devices have been characterized structurally with HRTEM and Raman spectroscopy. From current-voltage measurements, diode parameters including the ideality factor, the Schottky barrier height and the series resistance are extracted. With graphene it is possible to modify device performance through chemical doping of its monolayer surface. The change in diode performance can be correlated with the charge transfer from various adsorbents. As a result the Graphene Diodes Sensor (GDS) can be used as a probe for various chemicals.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131585151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Paydavosi, S. Venugopalan, A. Sachid, A. Niknejad, C. Hu, S. Dey, Samuel Martin, Xin Zhang
{"title":"Flicker noise in advanced CMOS technology: Effects of halo implant","authors":"N. Paydavosi, S. Venugopalan, A. Sachid, A. Niknejad, C. Hu, S. Dey, Samuel Martin, Xin Zhang","doi":"10.1109/ESSDERC.2013.6818863","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818863","url":null,"abstract":"A new model and a theory to capture the effects of halo (pocket) implants on the flicker noise of the advanced-node MOSFETs have been proposed and verified with measurements. The model can accurately capture the bias dependence of the drain-current flicker-noise (FN) power density. Also for the first time, we explain and model the unexpected channel-length dependence of FN power density in strong-halo devices.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134112808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Skotadis, D. Mousadakos, J. Tanner, D. Tsoukalas, P. Broutas
{"title":"Flexible platinum nanoparticle strain sensors","authors":"E. Skotadis, D. Mousadakos, J. Tanner, D. Tsoukalas, P. Broutas","doi":"10.1109/ESSDERC.2013.6818891","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818891","url":null,"abstract":"Using a modified magnetron sputtering technique, platinum nanoparticles having a mean diameter of 4-6 nm have been deposited on flexible polyimide substrates. The polyimide substrates have been previously patterned with gold interdigitated electrodes having an inter-finger distance of 10 μm using conventional photo lithography and the e-gun evaporation of gold. By controlling the nanoparticle deposition time, platinum nanoparticle sensors of varying sensitivity can be produced. As a result a flexible cost effective alternative to silicon strain sensors is hereby presented.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115531787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
O. Martin, É. Colinet, E. Sage, C. Dupré, P. Villard, S. Hentz, L. Duraffourg, T. Ernst
{"title":"Impact of process variability on a frequency-addressed NEMS array sensor used for gravimetric detection","authors":"O. Martin, É. Colinet, E. Sage, C. Dupré, P. Villard, S. Hentz, L. Duraffourg, T. Ernst","doi":"10.1109/ESSDERC.2013.6818820","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818820","url":null,"abstract":"Based on experimental results and a dedicated model, the impact of various technological parameters on the performance of a frequency addressed NEMS arrays sensor is investigated for mass sensing application. It is shown that the number of NEMS resonators that can be addressed in parallel is limited by critical dimensions fluctuations, the quality factor of the NEMS and their resonance frequencies.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127022439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Porous Si dielectric parameter extraction for use in RF passive device integration: Measurements and simulations","authors":"Panagiotis Sarafis, E. Hourdakis, A. Nassiopoulou","doi":"10.1109/ESSDERC.2013.6818828","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818828","url":null,"abstract":"The aim of this paper is to develop a formalism for porous Si dielectric parameter extraction for use in RF passive device design. We show that the extracted dielectric parameters using this formalism can be reliably used to simulate the experimental behavior of coplanar waveguides and inductors. In this respect we have fabricated RF devices on porous Si, extracted the dielectric parameters of the porous Si layer and used these parameters to simulate different RF devices, which are fabricated on the same type of material and tested experimentally. By comparing the simulations with the measurements a very good agreement is achieved.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124074053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Photodiodes in deep submicron CMOS process for fully integrated optical receivers","authors":"W. Ahmad, Markus Törmänen, H. Sjöland","doi":"10.1109/ESSDERC.2013.6818837","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818837","url":null,"abstract":"This paper explores the performance of CMOS photodiodes in a deep submicron CMOS technology to be used in fully integrated optical receiver intended for short range optical communication. For this purpose different structures of n-well/p-substrate photodiode were fabricated in 65nm CMOS process. When characterized at 850nm wavelength, DC responsivities between 0.12 and 0.16 A/W and 3-dB bandwidths of about 6 MHz with a roll-off of about 5.5dB/decade were measured. These results are important when designing the transimpedance amplifier and equalizer of a fully integrated optical receiver. A simple optical receiver is designed using results from these investigations.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"235 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116328654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Mizubayashi, K. Fukuda, T. Mori, K. Endo, Yongxun Liu, T. Matsukawa, S. O'Uchi, Y. Ishikawa, S. Migita, Y. Morita, A. Tanabe, J. Tsukada, H. Yamauchi, M. Masahara, H. Ota
{"title":"Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes","authors":"W. Mizubayashi, K. Fukuda, T. Mori, K. Endo, Yongxun Liu, T. Matsukawa, S. O'Uchi, Y. Ishikawa, S. Migita, Y. Morita, A. Tanabe, J. Tsukada, H. Yamauchi, M. Masahara, H. Ota","doi":"10.1109/ESSDERC.2013.6818854","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818854","url":null,"abstract":"We report guidelines for symmetric threshold voltage (V<sub>th</sub>) in double gate (DG) tunnel FinFETs (tFinFETs) with single and dual metal gate electrodes. To realize the symmetric V<sub>th</sub>=±0.2V, the work function difference (ΔΦ<sub>m</sub>) of each gate electrode in n- and p-type tFinFETs with a nondoped Si channel must be 1.34 eV, indicating that tuning the effective work functions in the dual metal gates is difficult. By adding Ge in the channel, the work function required in Ge-channel p-tFinFETs can be reduced to 4.46 eV, furthermore, ΔΦ<sub>m</sub> required to realize a symmetric V<sub>th</sub> in n- and p-type tFinFETs can be as small as the minimum value of 0.28 e V. This result means that a symmetric V<sub>th</sub> is realized in realistic dual metal gate materials by adding Ge. By using our independent DG tFinFETs with a novel source profile, a symmetric V<sub>th</sub> can be realized in a single metal gate in a Ge channel.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132629660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Richter, S. Vitusevich, S. Pud, Jing Li, L. Knoll, S. Trellenkamp, A. Schäfer, S. Lenk, Qing-Tai Zhao, A. Offenhäusser, S. Mantl, K. Bourdelle
{"title":"Low frequency noise in strained silicon nanowire array MOSFETs and Tunnel-FETs","authors":"S. Richter, S. Vitusevich, S. Pud, Jing Li, L. Knoll, S. Trellenkamp, A. Schäfer, S. Lenk, Qing-Tai Zhao, A. Offenhäusser, S. Mantl, K. Bourdelle","doi":"10.1109/ESSDERC.2013.6818867","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818867","url":null,"abstract":"MOSFETs and Tunnel-FETs (TFETs) based on arrays of nanowires (NWs) with 10 × 10 nm2 cross-section have been fabricated with strained silicon on insulator substrates. MOSFET devices show near ideal subthreshold slope close to 60 mV/dec proving excellent channel control achieved by high-k/metal gate stack. As expected fundamental differences between MOSFETs and TFETs in current-voltage characteristics are observed and analyzed. Low frequency noise spectra are studied for both types of devices. The devices show different behavior in terms of noise spectral density as a function of the applied gate voltage. A Hooge parameter of α = 7.3 × 10-3 is derived for the NW MOSFETs.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134266434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Schenk, S. Mueller, U. Schroeder, Robin Materlik, A. Kersch, M. Popovici, C. Adelmann, S. Elshocht, T. Mikolajick
{"title":"Strontium doped hafnium oxide thin films: Wide process window for ferroelectric memories","authors":"T. Schenk, S. Mueller, U. Schroeder, Robin Materlik, A. Kersch, M. Popovici, C. Adelmann, S. Elshocht, T. Mikolajick","doi":"10.1109/ESSDERC.2013.6818868","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818868","url":null,"abstract":"Ferroelectricity in hafnium oxide has been reported for the incorporation of Al, Si, Y and Gd or in a solid solution with the chemically similar ZrO2. Here, we report strontium as the first bivalent and — so far — largest dopant in terms of atomic radius also inducing ferroelectric behavior. Besides the solid solution of HfO2/ZrO2 for Sr:HfO2, ferroelectricity is observed in the widest concentration range of all dopants used up to now. First results of ab initio simulations also suggest such a comparatively wide window for ferroelectricity. With a coercive field of about 2 MV/cm another figure exceeds the characteristics reported before. A maximum remanent polarization of 23 μC/cm2 also ranks among the highest values reported until now. The fabricated TiN-Sr:HfO2-TiN capacitors exhibit switching times in the nanosecond range and still retain 80 % of their initial remanent polarization after 106 endurance cycles. The 10 nm ferroelectric thin films prepared by atomic layer deposition are capable of integration into 3D capacitors or FinFETs.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126372537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}