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2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)最新文献

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Cyborg insects, neural dust and other things: Building interfaces between the synthetic and the multicellular 半机械昆虫，神经尘埃和其他东西:在合成细胞和多细胞之间建立接口
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-10-31 DOI: 10.1109/ESSCIRC.2013.6649060
T. Blanche, J. Kleef, P. Ledochowitsch, T. L. Massey, R. Muller, D. Seo, M. Maharbiz
{"title":"Cyborg insects, neural dust and other things: Building interfaces between the synthetic and the multicellular","authors":"T. Blanche, J. Kleef, P. Ledochowitsch, T. L. Massey, R. Muller, D. Seo, M. Maharbiz","doi":"10.1109/ESSCIRC.2013.6649060","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2013.6649060","url":null,"abstract":"As the computation and communication circuits we build radically miniaturize (i.e. become so low power that 1 pJ is sufficient to bang out a bit of information over a wireless transceiver; become so small that 500 μm2 of thinned CMOS can hold a reasonable sensor front-end and digital engine), the barrier to introducing all sorts of interfaces and control loops into organisms will lower radically. Put another way, the rapid pace of computation and communication miniaturization is swiftly blurring the line between the technological base that created us and the technological based we've created. This talk will provide an overview of recent work in the Maharbiz lab that touches on this concern. Some of this will cover our ongoing exploration of the remote control of insects in free flight via implantable radio-equipped miniature neural stimulating systems and more recent work in next generation mammalian neural interfaces for brain machine interface (BMI) applications, including neural dust.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131012108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Novel back-biased UTBB lateral SCR for FDSOI ESD protections 用于FDSOI ESD保护的新型反向偏置UTBB横向可控硅
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-16 DOI: 10.1109/ESSDERC.2013.6818859
Y. Solaro, P. Fonteneau, C. Legrand, C. Fenouillet-Béranger, P. Ferrari, S. Cristoloveanu
{"title":"Novel back-biased UTBB lateral SCR for FDSOI ESD protections","authors":"Y. Solaro, P. Fonteneau, C. Legrand, C. Fenouillet-Béranger, P. Ferrari, S. Cristoloveanu","doi":"10.1109/ESSDERC.2013.6818859","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818859","url":null,"abstract":"For the first time, a Lateral SCR (Silicon Controlled Rectifier) with Ultra-Thin Body and Buried Oxide (UTBB) is experimentally demonstrated. This device is dedicated to Electro-Static Discharge (ESD) protection and has been designed and fabricated with 28 nm Fully Depleted SOI technology. A new control technique is proposed: the use of back-gate biasing. Characteristics such as low leakage, controllable triggering (as a function of back gate voltage and ground-plane type), and device geometry are explored. We discuss several configurations (floating or locked P-base) and show promising results in terms of ESD protection performance.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121388211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Role of junction depth in light emission from silicon p-i-n leds 结深在硅p-i-n led发光中的作用
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-16 DOI: 10.1109/ESSDERC.2013.6818833
G. Piccolo, A. Sammak, R. Hueting, J. Schmitz, L. Nanver
{"title":"Role of junction depth in light emission from silicon p-i-n leds","authors":"G. Piccolo, A. Sammak, R. Hueting, J. Schmitz, L. Nanver","doi":"10.1109/ESSDERC.2013.6818833","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818833","url":null,"abstract":"We present a study of lateral silicon p-i-n light-emitting diodes, fabricated on SOI substrates. The p+ and n+ junctions were varied between conventional and ultra-shallow, utilizing pure-B and pure-P doping techniques. The impact of junction changes on both current-voltage behavior and light emission is discussed, based on experimental results and device modeling. The results stipulate that only a balanced carrier injection leads to efficient light emission and that uniform light emission across the intrinsic region can be obtained with a well-chosen p-i-n architecture.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129080544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Magnetoresistance measurements and unusual mobilitiy behavior in FD MOSFETs fdmosfet的磁阻测量和不寻常的迁移行为
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-16 DOI: 10.1109/ESSDERC.2013.6818877
Sung‐Jae Chang, S. Cristoloveanu, M. Bawedin, Jong-Hyun Lee, Jung-Hee Lee, S. Mukhopadhyay, B. Piot
{"title":"Magnetoresistance measurements and unusual mobilitiy behavior in FD MOSFETs","authors":"Sung‐Jae Chang, S. Cristoloveanu, M. Bawedin, Jong-Hyun Lee, Jung-Hee Lee, S. Mukhopadhyay, B. Piot","doi":"10.1109/ESSDERC.2013.6818877","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818877","url":null,"abstract":"Advanced planar MOSFET and FinFET transistors on SOI have been characterized under high magnetic field. The geometrical magnetoresistance stands as the most accurate and indisputable technique for mobility measurements. Our results show that this method is also effective in both planar (FD-SOI) and vertical (FinFET) transistors with ultrathin body. For the first time, we apply the magnetoresistance for evaluating not only the properties of separate channels, but also their interaction mechanisms. Unconventional mobility curves with multi-branch aspect are recorded when two or more channels coexist. They are explained by the variations in effective field and centroid of the inversion charge. A marked difference is observed between front and back channels as well as between planar and FinFET devices.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133962298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Why are SCE overestimated in FD-SOI MOSFETs? 为什么在FD-SOI mosfet中SCE会被高估?
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-16 DOI: 10.1109/ESSDERC.2013.6818879
C. Navarro, M. Bawedin, F. Andrieu, B. Sagnes, S. Cristoloveanu
{"title":"Why are SCE overestimated in FD-SOI MOSFETs?","authors":"C. Navarro, M. Bawedin, F. Andrieu, B. Sagnes, S. Cristoloveanu","doi":"10.1109/ESSDERC.2013.6818879","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818879","url":null,"abstract":"Experimental results show that the measurement and interpretation of short-channel effects (SCE) are misleading in advanced SOI MOSFETs. Part of SCE is due to the parasitic contribution of the back gate via channel coupling. We demonstrate that the contributions of each gate to the overall SCE can be discriminated. Numerical simulations indicate that their mutual relevance depends on the transistor architecture. A pragmatic biasing method is proposed for the reduction of charge sharing and DIBL effects. We present a simple model which is effective in decorrelating the genuine SCE at each gate and can be advantageously applied to device optimization.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130178755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Nonvolatile resistive memory devices based on hydrogenated amorphous carbon 基于氢化非晶碳的非易失性电阻存储器件
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818870
L. Dellmann, A. Sebastian, V. Jonnalagadda, C. Santini, W. Koelmans, C. Rossel, E. Eleftheriou
{"title":"Nonvolatile resistive memory devices based on hydrogenated amorphous carbon","authors":"L. Dellmann, A. Sebastian, V. Jonnalagadda, C. Santini, W. Koelmans, C. Rossel, E. Eleftheriou","doi":"10.1109/ESSDERC.2013.6818870","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818870","url":null,"abstract":"There has recently been increased interest in carbon-based resistive random-access (RRAM) memory. Carbon-based RRAM has the potential to scale to atomic dimensions, resulting in ultra-high-density and low-power memory. Here we report reversible unipolar resistance switching in hydrogenated amorphous carbon. The devices used in this study are fabricated using e-beam lithography with built-in series resistors. A thorough analysis of the electrical transport and the resistance switching mechanism is presented.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125947100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Automotive electronics and energy efficiency 汽车电子和能源效率
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818807
R. Ploss
{"title":"Automotive electronics and energy efficiency","authors":"R. Ploss","doi":"10.1109/ESSDERC.2013.6818807","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818807","url":null,"abstract":"Infineon is working to develop those semiconductors that help to improve the efficiency and functionality of devices at reduced costs. With its 300mm thin-wafer technology, Infineon is lowering the production costs of power semiconductors. At the same time, this new manufacturing technology opens up potential for further performance gains. The greatest improvements can only be achieved through holistic thought and action. This is why Infineon's strategy is \"From Product to System\". Our major focus is not only making the better semiconductor, but to a much greater extent, making better devices and better overall systems. What can we expect from the future? Our vision of Smart Mobility shows what the use of semiconductors coupled with great innovative strength can achieve. Optimization is happening at all levels: From components to applications to systems. Autonomous vehicles would be safer (accident prevention through radar) and more energy efficient (due to better controlled traffic flows/avoidance of traffic jams/optimal infrastructure utilization). The result: More value and convenience with higher efficiency - with semiconductors as the determining factor.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123566547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Scalability of ultra-thin-body and BOX InGaAs MOSFETs on silicon 超薄体和BOX InGaAs mosfet的可扩展性
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818839
L. Czornomaz, N. Daix, Pranita Kerber, K. Lister, D. Caimi, C. Rossel, M. Sousa, E. Uccelli, J. Fompeyrine
{"title":"Scalability of ultra-thin-body and BOX InGaAs MOSFETs on silicon","authors":"L. Czornomaz, N. Daix, Pranita Kerber, K. Lister, D. Caimi, C. Rossel, M. Sousa, E. Uccelli, J. Fompeyrine","doi":"10.1109/ESSDERC.2013.6818839","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818839","url":null,"abstract":"In this work, we show for the first time that VLSI-like gate-first self-aligned InGaAs MOSFETs on insulator on Si featuring raised source/drain (SID) can be fabricated at 300 nm pitch with gate lengths down to 24 nm. This is made possible thanks to the excellent thermal stability of ultra-thin-body and BOX InGaAs on insulator which can be used as a crystalline seed for III-V regrowth. The devices exhibit an excellent electrostatic integrity down to LG = 34 nm, comparable to the best reported tri-gate devices. We compare experimental device data to electrostatic simulations for bulk/on-insulator/tri-gate structures and extrapolate their ultimate scalability to very short LG.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114931481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Electron delay analysis and image charge effect in AlGaN/GaN HEMT on silicon substrate 硅衬底上AlGaN/GaN HEMT的电子延迟分析及像电荷效应
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818818
Alain Agboton, N. Defrance, Phillipe Altuntas, Vannessa Avramovic, A. Cutivet, Rezky Ouhachi, J. D. Jaeger, Samira Bouzid-Driad, H. Maher, Michel Renvoise, P. Frijlink
{"title":"Electron delay analysis and image charge effect in AlGaN/GaN HEMT on silicon substrate","authors":"Alain Agboton, N. Defrance, Phillipe Altuntas, Vannessa Avramovic, A. Cutivet, Rezky Ouhachi, J. D. Jaeger, Samira Bouzid-Driad, H. Maher, Michel Renvoise, P. Frijlink","doi":"10.1109/ESSDERC.2013.6818818","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818818","url":null,"abstract":"A delay time analysis is carried out for SiN-passivated AlGaN/GaN High Electron Mobility Transistors (HEMTs) on silicon substrate featuring gate length of 90 nm. The influence of high parasitics in the access pads is considered using de-embedding procedure from the measured S parameters. From the obtained transit delay contributions, the effective electron velocity is estimated to 0.85×107 cm.s-1. In addition, the effect of the image charge on the drain delay is experimentally demonstrated through the extraction of the mirroring coefficient a close to the predicted simulation value.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"146 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116728843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reconfigurable nanowire electronics — Device principles and circuit prospects 可重构纳米线电子学。器件原理和电路展望
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818865
W. Weber, J. Trommer, Dominik Martin, M. Grube, A. Heinzig, T. Mikolajick
{"title":"Reconfigurable nanowire electronics — Device principles and circuit prospects","authors":"W. Weber, J. Trommer, Dominik Martin, M. Grube, A. Heinzig, T. Mikolajick","doi":"10.1109/ESSDERC.2013.6818865","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818865","url":null,"abstract":"Reconfigurable Nanowire Transistors merge the electrical properties of unipolar n- and p- type FETs into a single type of device with identic technology, geometry and composition. These four-terminal nanowire transistors employ an electric signal to dynamically program unipolar n- or p-type behavior. More than reducing the technological complexity, they open up the possibility of dynamically programming the functions of circuits at the device level, i.e. enabling a fine-grain reconfiguration of complex functions. We will review different reconfigurable concepts, analyze the transport properties and finally assess their maturity for building circuits.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129690160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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