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2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)最新文献

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A two-step set operation for highly uniform resistive swtiching ReRAM by controllable filament 采用可控灯丝进行高均匀电阻开关的两步设定操作
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818848
Sangheon Lee, Daeseok Lee, J. Woo, E. Cha, H. Hwang
{"title":"A two-step set operation for highly uniform resistive swtiching ReRAM by controllable filament","authors":"Sangheon Lee, Daeseok Lee, J. Woo, E. Cha, H. Hwang","doi":"10.1109/ESSDERC.2013.6818848","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818848","url":null,"abstract":"For the first time, we demonstrate filament controllability by a two-step set operation based on triple-layer ReRAM. Hence, we report a highly reliable memory switching of a triple-layer structure based on resistive switching memory devices by inserting an additional binary metal oxide layer. The inserted oxide layer in the triple-layer can act as a filament controlling factor with the two-step set operation for reliable resistive switching. Compared with the bi-layer structure, the three layers of the two-step set operation showed excellent uniform Vset, Vreset, high-resistance state (RHRS), and low-resistance state (RLRS). Furthermore, the devices exhibited excellent memory performance such as endurance, resistance on/off ratio, and reliable data retention of up to 104 s at 180°C.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116377346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Understanding the conduction mechanism of the chalcogenide Ag2S silver-doped through ab initio simulation 通过从头算模拟了解硫系Ag2S银掺杂的导电机理
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818888
T. Todorova, P. Blaise, E. Vianello, L. Fonseca
{"title":"Understanding the conduction mechanism of the chalcogenide Ag2S silver-doped through ab initio simulation","authors":"T. Todorova, P. Blaise, E. Vianello, L. Fonseca","doi":"10.1109/ESSDERC.2013.6818888","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818888","url":null,"abstract":"Using first-principles calculations we have investigated the electronic properties of Ag<sub>2</sub>S, which is commonly employed as the active matrix in nonvolatile conductive-bridge random access memories (CBRAM). To better understand the origin of the high conductivity of Ag-doped Ag<sub>2</sub>S we have created a new model for the high temperature form of this material, with electronic properties in good agreement with the available data. We have found that for a local silver concentration of 7.02 × 10<sup>-4</sup> mol/cm<sup>2</sup>Ag<sub>2</sub>S switches from a semiconductor to a metal, while for a slightly higher concentration of 7.05 × 10<sup>-4</sup>mol/cm<sup>3</sup>Ag<sub>2</sub>S forms polytetrahedral clusters within the structure. Our findings offer a consistent explanation for the measured high conductivity of Ag<sub>2</sub>S.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132259870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
New color sensor concept based on single spectral tunable photodiode 基于单光谱可调谐光电二极管的新颜色传感器概念
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818835
A. Wachowiak, S. Slesazeck, P. Jordan, J. Holz, T. Mikolajick
{"title":"New color sensor concept based on single spectral tunable photodiode","authors":"A. Wachowiak, S. Slesazeck, P. Jordan, J. Holz, T. Mikolajick","doi":"10.1109/ESSDERC.2013.6818835","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818835","url":null,"abstract":"In this work we present a new operational principle of an adjustable, high resolution color sensor. The concept is based on a single photodiode, which was specifically designed for a variable spectral response, corresponding to the extension of its space charge region. A wide range of spectral sensitivity functions (i.e. the receptor function of the human eye) can be emulated from a series of measured photo currents under different voltage bias conditions. The variable photodiode was realized in hardware, and its functionality for true color sensing was confirmed by electro-optical measurements and algorithmic transformations. The new tunable photodiode enables a very flexible sensor operation. It allows for modifications of the functionality of the sensor, which is defined by its spectral response function, even during operation simply by changing the measurement protocol and algorithmic processing e.g, software adaption. No change in the hardware configuration of the sensor is necessary.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134194241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
MEMS sensors for high voltage lines 高压线路用MEMS传感器
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818892
V. Moagar-Poladian, G. Moagăr-Poladian
{"title":"MEMS sensors for high voltage lines","authors":"V. Moagar-Poladian, G. Moagăr-Poladian","doi":"10.1109/ESSDERC.2013.6818892","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818892","url":null,"abstract":"The paper presents the application for the first time, to our knowledge, of MEMS devices in the field of high power, high voltage lines. We show how these devices can be used for measuring instantaneous voltage value in real-life industrial conditions. The high voltage MEMS device allows a voltage measurement relative error less than 0,1 % in normal conditions while during a strong earthquake (0,28g soil acceleration - `g' is the gravitational acceleration) it increases to 6 %. We present simulation results and the experimental realization of the optimized sensor model in polymer by using 3D Rapid Prototyping means.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134243830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Connecting RRAM performance to the properties of the hafnia-based dielectrics 将RRAM性能与基于铪的电介质的特性联系起来
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818844
G. Bersuker, B. Butcher, D. Gilmer, P. Kirsch, L. Larcher, A. Padovani
{"title":"Connecting RRAM performance to the properties of the hafnia-based dielectrics","authors":"G. Bersuker, B. Butcher, D. Gilmer, P. Kirsch, L. Larcher, A. Padovani","doi":"10.1109/ESSDERC.2013.6818844","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818844","url":null,"abstract":"The connection between the resistive-RAM (RRAM) operational-mechanism, performance, and utilized-dielectric-properties is described. Specifically, the atomic-level description of bi-polar hafnia-based RRAM, which operations involve the repeatable rupture/recreation of a localized conductive path, reveals that its performance is determined by the outcome of the initial forming process; defining the structural characteristics of the conductive filament and distribution of the oxygen ions released from the filament region. The ion distribution, in turn, is found to be linked to the level of dielectric oxygen deficiency, which may either assist or suppress the resistive switching process. With this improved understanding of the connection between RRAM performance and materials properties the optimization of RRAM devices may be more readily achieved.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"235 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133398952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Investigation of gate material ductility enables flexible a-IGZO TFTs bendable to a radius of 1.7 mm 栅极材料延展性的研究使柔性a- igzo tft可弯曲到半径为1.7 mm
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818893
N. Münzenrieder, L. Petti, C. Zysset, Deniz Gork, Lars Büthe, G. Salvatore, G. Tröster
{"title":"Investigation of gate material ductility enables flexible a-IGZO TFTs bendable to a radius of 1.7 mm","authors":"N. Münzenrieder, L. Petti, C. Zysset, Deniz Gork, Lars Büthe, G. Salvatore, G. Tröster","doi":"10.1109/ESSDERC.2013.6818893","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818893","url":null,"abstract":"TFTs on flexible plastic foils have the potential to enable new applications like electronic skins or smart textiles. Due to the temperature sensitivity of plastic substrates, amorphous In-Ga-Zn-O (a-IGZO) is a promising semiconductor since it provides a carrier mobility >10 cm2/Vs when deposited at room temperature. Therefore, a-IGZO TFTs have significantly increased electrical performance compared to organic TFTs, but also suffer from a decreased bendability. Here, focused ion beam (FIB) images are used to identify the gate metal as the dominant factor for the formation of cracks in bent a-IGZO TFTs. Flexible a-IGZO TFTs using a high-k Al2O3 gate dielectric and different gate contact materials (Cr, Pt, Ti, or Cu) exhibit a similar effective mobility μFE, threshold voltage VTH, and on-off current ratio of: ≈15 cm2/Vs, ≈1 V, and >109. Simultaneously, bending experiments confirmed that their bendability depends on the ductility of the gate material. These findings are used to identify Cu as suitable gate material, and to fabricate a-IGZO TFTs on free-standing plastic foil which can be operated at a bending radius of 1.7 mm (1.55% strain), whereas bending shifts μFE and VTH only by + 2%, and - 6 mV.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129567523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Reliability tests for discriminating between technological variants of QFN packaging 鉴别QFN封装技术变体的可靠性测试
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818860
M. Bazu, V. Ilian, D. Varsescu, L. Galateanu, Vili Sikio, Meelis Reimets, Volker Uhl, Manuel Weiss
{"title":"Reliability tests for discriminating between technological variants of QFN packaging","authors":"M. Bazu, V. Ilian, D. Varsescu, L. Galateanu, Vili Sikio, Meelis Reimets, Volker Uhl, Manuel Weiss","doi":"10.1109/ESSDERC.2013.6818860","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818860","url":null,"abstract":"A procedure of reliability testing for discriminating between various technological variants is described. This procedure is used for choosing the most reliable variant of QFN packaging, the competitors being the conventional oven curing against three variants of microwave curing. The results, based on failure analysis and statistical processing of data, clearly show that the best choice is one of the variants of microwave curing.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"2015 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114488556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Influence of device scaling on low-frequency noise in SOI tri-gate N- and p-type Si nanowire MOSFETs 器件缩放对SOI三栅极N型和p型硅纳米线mosfet低频噪声的影响
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818878
M. Koyama, M. Cassé, R. Coquand, S. Barraud, G. Ghibaudo, H. Iwai, G. Reimbold
{"title":"Influence of device scaling on low-frequency noise in SOI tri-gate N- and p-type Si nanowire MOSFETs","authors":"M. Koyama, M. Cassé, R. Coquand, S. Barraud, G. Ghibaudo, H. Iwai, G. Reimbold","doi":"10.1109/ESSDERC.2013.6818878","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818878","url":null,"abstract":"Low-frequency noise (LFN) has been investigated in tri-gate (TG) Si nanowire (NW) FET. We have carefully measured and analyzed LFN for gate length down to 40 nm and cross-section width down to 10 nm. Drain current noise spectral density has been measured in linear region from weak to strong inversion of transistor operation. In particular, we have shown that the LFN behavior is in good agreement with carrier number fluctuations with correlated mobility fluctuations model in ultra-scaled TGNW FETs. We did not observe large contribution due to surface orientation difference between (100) top and (110) side-wall surfaces of TGNW. Moreover, the extracted oxide trap density is roughly the same for reference wide devices and TGNW FETs without significant impact of channel area downscaling and geometry.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115702969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
FinFETs — Technology and circuit design challenges finfet -技术和电路设计挑战
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818808
W. Maszara, M. Lin
{"title":"FinFETs — Technology and circuit design challenges","authors":"W. Maszara, M. Lin","doi":"10.1109/ESSDERC.2013.6818808","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818808","url":null,"abstract":"It took quarter of a century for multi-gate transistor to make it from first demonstration in research to a product - 22nm technology node microprocessor in 2012. FinFETs offer superior performance over incumbent planar devices due to their significantly improved electrostatics. FinFET technology faced two key barriers to their implementation in products: demanding process integration and its significant impact on layout and circuit design methodology. In this paper we focus on challenges and tradeoffs in both of these areas. Fin shape, pitch, isolation, doping, crystallographic orientation and stressing as well as device parasitics, performance and patterning approaches will be discussed. Implementation of high mobility materials for finFET devices will also be briefly reviewed as well as design challenges for logic and SRAM circuits.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129695076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Monolithic fabrication of a planar Gunn diode and a pHEMT side-by-side 平面Gunn二极管和pHEMT并排的单片制造
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2013-09-01 DOI: 10.1109/ESSDERC.2013.6818831
V. Papageorgiou, A. Khalid, M. Steer, Chong Li, D. Cumming
{"title":"Monolithic fabrication of a planar Gunn diode and a pHEMT side-by-side","authors":"V. Papageorgiou, A. Khalid, M. Steer, Chong Li, D. Cumming","doi":"10.1109/ESSDERC.2013.6818831","DOIUrl":"https://doi.org/10.1109/ESSDERC.2013.6818831","url":null,"abstract":"This work presents the implementation of planar Gunn diodes and pseudomorphic high electron mobility transistors (pHEMTs) on the same wafer for the first time. The AlGaAs/InGaAs/GaAs heterostructures were designed for the realisation of pHEMTs on a Gallium Arsenide - based wafer. T-gate technology has been used for the maximisation of the transistor performance. Devices with a 70 nm long gate foot showed excellent DC and small-signal characteristics, with 780 mS/mm peak transconductance and 200 GHz fmax. Planar Gunn diodes were fabricated in parallel with the pHEMTs, sharing most of the fabrication steps. The diodes produce oscillations with 87.6 GHz maximum frequency and -40 dBm maximum output power.","PeriodicalId":112804,"journal":{"name":"2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117067022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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