2011 IEEE AUTOTESTCON最新文献

{"title":"On-line intermittent connector anomaly detection","authors":"A. Ginart, I. Ali, J. Goldin, I. Barlas, P. Kalgren, M. Roemer, E. Balaban","doi":"10.1109/AUTEST.2011.6058777","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058777","url":null,"abstract":"This paper investigates a non-traditional use of differential current sensor and current sensor to detect intermittent disconnection problems in connectors. An intermittent disconnect, often resulting in an arc, creates an imbalance which is manifested in the current. The traveling wave generated due to the perturbation can be detected using current sensors. This paper shows the feasibility to detect disconnection based on this principle.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115441389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"CASS family TPS Support toolset","authors":"G. Garcia, Rob Loe, B. Bravo, J. Cifredo","doi":"10.1109/AUTEST.2011.6058781","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058781","url":null,"abstract":"Migration, maintenance and regression of more than three hundred (300) Test Program Set (TPS) to support all existing (i.e., Consolidated Automated Support System (CASS) and Reconfigurable Transportable Consolidated Automated Support System (RTCASS)) and future (e.g., electronic Consolidated Automated Support System (eCASS)) CASS Family Automated Test Equipment (ATE) members can be an overwhelming task that requires compilation and build of source, translation, data transfer and data validation.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114980509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Scalable benchtop test system applying IEEE-P1693 MIPSS standard","authors":"M. Stora, R. Freeman, B. James","doi":"10.1109/AUTEST.2011.6058759","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058759","url":null,"abstract":"This paper discusses Modular Integration Packaging for Scalable System (MIPSS) being developed under a preliminary standard IEEE-P1693 and describes a benchtop application of the new architecture design. The building block approach segments a test system into core and augmented elements as illustrated in Figure 1. MIPSS defines the electrical and mechanical specifications of a modular interconnect packaging system design for Automatic Test System (ATS) that can be applied in portable/benchtop and rack mounted versions. It specifically, describes a building block approach based upon the integration of four elements: (1) the mechanical chassis that forms the mechanical structure of the building block with alignment features to mate with other enclosures [building blocks], optional test interface choice emulating DOD Interface Standards [1] [2]; (2) merging of VXI/PXI/M-Module [3] [4] [5] multi-standard instrumentation under a single plug&play platform along; (3) mechanical/electrical extension that couples the instrumentation directly to a pluggable test interface panel of choice that connects to the Unit-Under-Test (UUT); and (4) a new pluggable virtual power source. These elements serve to significantly downsize footprint, reduce costs, reuse existing VXI inventory and integrate multi-standard instruments in a common platform, improve maintainability, support organic plug&play integration and enhance current VXI-based DOD ATS (Fig.1), or commercial ATS applications.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128203518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modeling of jitter and its effects on time interleaved ADC conversion","authors":"C. Parkey, W. Mikhael, D. Chester, M. Hunter","doi":"10.1109/AUTEST.2011.6058747","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058747","url":null,"abstract":"Post analog-to-digital conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like Synthetic Instrumentation (SI), Software Defined Radio (SDR), RADAR, etc. This paper introduces a high fidelity Simulink™ based behavioral error model for time-interleaved analog-to-digital converters (TI-ADCs) to facilitate development of efficient post conversion correction algorithms for TI-ADCs. Theoretically TI-ADCs offer a technologically feasible and cost effective solution to the digitization of wide bandwidth analog signals. The contribution of the error model described in this paper solves a key obstacle in economical research and development in this area. In addition to the error sources associated with integrated high performance analog to digital converters ADCs, mismatched error sources affect the performance of time interleaved configurations.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"139 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128916226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Relays fail - test systems don't have to","authors":"J. Dolman, Luke Schreier","doi":"10.1109/AUTEST.2011.6058729","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058729","url":null,"abstract":"As the trend in automated test continues toward hardware standardization, engineers increasingly rely on large switch architectures to customize the connectivity in their applications. When designed correctly, these switch systems route signals almost transparently between instruments and test points, improving measurement repeatability and reducing test time. Unfortunately, while these switches maximize flexibility, the number of potential failure points increases with each new relay in the system. Switching considerations are often overlooked during development, and the resulting automated test equipment (ATE) performance is frequently diminished. To successfully integrate switching, engineers need to design systems to avoid, anticipate, and resolve system failures. This paper examines some techniques to effectively manage the risks associated with large switching systems.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123095082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"BIT/BITE/ED/EP/IVHM and ATE in DA","authors":"Willis H. Yarnall, Charles R. Moore, P. Dussault","doi":"10.1109/AUTEST.2011.6058763","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058763","url":null,"abstract":"Automatic test equipment (ATE) in the Department of the Army (DA) finds itself in an ever challenging and changing role in an effort to support the Future Force of the 21st century. Challenging in that the ATE today must combat obsolescence while supporting both the legacy and future systems; and changing in that Army Transformation is transitioning from four (4) to two (2) levels of maintenance support. Advances in technology in the areas of built-in-test (BIT), built-in-test equipment (BITE), embedded diagnostics (ED), embedded prognostics (EP) and integrated vehicle health management (IHVM) have been the primary enablers allowing the DA to make major changes in maintenance, test philosophy and logistics in order to reduce cost, schedule and time. BIT/BITE/ED/EP/IVHM and ATE complement one another and each play a valuable and vital role in the maintenance and logistics support of the Future Force.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"398 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116081743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"MEMS an alternative paradigm for ATE RF designers","authors":"R. Buckley","doi":"10.1109/AUTEST.2011.6058724","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058724","url":null,"abstract":"The problem in the field of electronics has always been how to reduce the size, weight and power consumption of devices without sacrificing speed, bandwidth, or the specifications delivered via discrete or semiconductor technology. This paper discusses Microelectromechanical Systems (herein called MEMS) as an integration of mechanical and electronic elements on a common substrate manufactured using today's micro fabrication technology and offering one potential robust solution to this problem. This technology integrates design, engineering and manufacturing methods. These include batch processing methods of integrated circuits, mechanical/electrical/chemical engineering, materials science, plus instrumentation and packaging technologies. Although first demonstrated in the 1960's when Nathanson produced the first batch fabricated MEMS device called the Resonant Gate Transistor (called RGT), progress was slow during the 1970's with the introduction of the first MEMS silicon accelerometer and later the first micro machined inkjet nozzle. Progress in MEMS saw the first experiments in micro machined silicon and more widespread development of blood pressure transducers, accelerometers in air bags for the automotive industry and gyroscopes for inertial navigation. It was not until the 1990's and 2000's that more robust fabrication technologies allowed wider development and distribution of MEMS devices including those which have made for higher reliable, reduced cost and reduced packaging for RF subsystems. Today's micro machined technologies offer developers a key design tool. Since designers recognize the key to higher reliability, and greater product proliferation is to meet goals such as small in size, less power consumption and reduced cost; it is no wonder why this technology is viewed with such great enthusiasm. It should be clear that MEMS have enormous potential for use across a wide range of systems from biomedical, automotive, communications and defense. MEMS will solve many design problems of wireless communications. Also the broad spectrum applications make the cost of fabrication techniques on a micro level possible and affordable. This paper will focus on RF Subsystems, important specifications, some key components and application to ATE.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126432615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"System design of a C-17 Radome Test Station","authors":"P. J. Bryant, T. J. Tillman","doi":"10.1109/AUTEST.2011.6058740","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058740","url":null,"abstract":"Changes in the mission profile and harsh operational environments are believed to have caused pre-mature aging of the C-17 nose and tail radomes. As a result, age related changes of the operational characteristics of the radomes were experienced earlier than expected. Because the C-17 is projected to serve as the backbone of the strategic airlift fleet for the next several decades, these conditions precipitated the requirement for additional repair and testing capabilities. These capabilities, which are viewed as part of the overall maintenance architecture for the C-17, were developed by the Mercer Engineering Research Center (MERC) as the repair validation component of the architecture to return the radomes to service. The system was eventually transitioned to the C-5 radomes as well. The test system requirements, design and facility requirements of the subject radome test system are presented in this paper.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133972936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modernizing a DoD ATS family - part II","authors":"M. W. Reagan","doi":"10.1109/AUTEST.2011.6058762","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058762","url":null,"abstract":"This paper follows up the paper “Modernizing a DoD ATS Family” by William A. Ross that was published in the Proceedings of IEEE AUTOTESTCON 2005. That paper reviewed the Navy's CASS modernization planning, including the requirements leading to a need to modernize CASS, the goals and objectives of the modernization program, identification and evaluation of alternatives, and major issues to be addressed. It concluded with the Navy's vision for the modernized CASS. This paper reviews the activities and events that actually happened between the initial planning through award of the eCASS System Design and Development contract in March 2010. It compares the current objectives and expectations of the program with those listed in 2005. It details exactly which configurations of the CASS family will be replaced by eCASS, and it describes the eCASS mission areas and how they will be addressed through the implementation of Mission Equipment Kits. It describes the initial architecture and instrumentation of the eCASS station and discusses the migration of test program sets to eCASS from mainframe CASS. It describes the plans for taking eCASS into production and fielding, and for sustaining mainframe CASS during the fielding process.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128121446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Solderless fault insertion test set to enhance ATE operator training","authors":"C. P. Heagney","doi":"10.1109/AUTEST.2011.6058786","DOIUrl":"https://doi.org/10.1109/AUTEST.2011.6058786","url":null,"abstract":"It is the mandate of Automated Test Equipment (ATE) to minimize manual tasking and maximize automation. However, the role of the operator remains crucial to successful deployment of any ATE system. Simple tasks such as setting up the Unit Under Test (UUT), correct probing, potentiometer alignments, etc. must be taught so new operators can establish a basic level of diagnostic capability in the fleet. Current Consolidated Automated Support System (CASS) training hardware is based on F-14 and S-3 platforms which are obsolete, utilize antiquated technology, and are difficult to repair. Such hardware also limits Instructors' ability to insert and remove effective training faults. This paper describes a design concept which provides a robust training test set, including hardware, for operators to learn basic troubleshooting skills and ATE interaction. The US Navy recognized the benefits of such a system to address training deficiencies and initiated the development and acquisition of the CASS Training Set (CATS). The test set includes a variety of training scenarios which are commonly seen in the fleet, including digital tests, analog tests, Operational Flight Program (OFP) loads, alignments, Radio Frequency (RF) tests, diagnostics, etc. The CATS training UUT uses latching relays to induce consistent, repeatable hardware faults, and a microcontroller to produce software faults. Faults are applied and removed through the Test Program Set (TPS) and require no soldering or de-soldering of components. This process automates training fault insertion, extends the life of the training equipment, and provides repeatable fault signatures. Consistent training scenarios ensure lower variance in technical capabilities of course graduates. A complete hardware and software package with the look-and-feel of a fleet avionics asset, but the reliability to withstand a training environment provides a valuable tool to train ATE operators and should be a basic part of any ATE system.","PeriodicalId":110721,"journal":{"name":"2011 IEEE AUTOTESTCON","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124942611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}