Microprocessing and Microprogramming最新文献_第7页

An explicitly declared delayed-branch mechanism for a superscalar architecture 超标量体系结构的显式声明延迟分支机制

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90016-7

Roger Collins, Gordon Steven

{"title":"An explicitly declared delayed-branch mechanism for a superscalar architecture","authors":"Roger Collins, Gordon Steven","doi":"10.1016/0165-6074(94)90016-7","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90016-7","url":null,"abstract":"<div><p>One of the main obstacles to exploiting the fine-grained parallelism that is available in general-purpose code is the frequency of branches that cause unpredictable changes in the control flow of a program at run-time. Whenever a branch is taken, a performance penalty may be incurred as the processor waits for instructions to be fetched from the branch target stream. RISC processors introduce a delayed-branch mechanism which defines branch delay slots into which code can be scheduled. This strategy allows the processor to be kept busy executing useful instructions while the change of control flow takes place. While the concept of delayed branches can be readily extended to VLIW architectures, it is less clear how it should be incorporated in a superscalar architecture. This paper proposes a general branch-delay mechanism which is suitable for a range of code-compatible superscalar processors and which completely avoids the need to introduce NOPs into the code. This technique was developed as an integral part of the HSP superscalar project. HSP is a superscalar architecture currently being researched at the University of Hertfordshire with the aim of using compile-time instruction scheduling to achieve an order of magnitude speed-up over traditional RISC architectures for a suite of non-numeric benchmark programs.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 677-680"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90016-7","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72293895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Conformance testing of X-25 packet level X-25数据包级别的一致性测试

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90022-1

J. Miskolczi , Ta Manh Dung , K. Tarnay , J. Szabó

引用次数: 1

Pattern recognition with fuzzy neural network 基于模糊神经网络的模式识别

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90073-6

V. Guštin, J. Virant

引用次数: 5

Analysis of network protocol performance in the context of multi-workstation parallel distributed applications 多工作站并行分布式应用环境下网络协议性能分析

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90045-0

Matthew J. Jubb, Alan Purvis

引用次数: 2

Optimal evaluation of path predicates in object-oriented queries 面向对象查询中路径谓词的优化评估

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90033-7

Sang Koo Seo, Yoon Joon Lee

引用次数: 1

Coupling algorithms for replicated objects and processes 用于复制对象和进程的耦合算法

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90043-4

Vittoria Gianuzzi

引用次数: 0

Adaptive Steiner tree balancing in distributed algorithm for multicast connection setup 分布式多播连接建立算法中的自适应斯坦纳树平衡

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90042-6

Roman Novak, Gorazd Kandus

引用次数: 4

Towards amalgamating high-level synthesis and proof systems 迈向高水平综合与证明系统的融合

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90067-1

Mats Larsson

引用次数: 0

Implementing associations between objects 实现对象之间的关联

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90046-9

Audrey Mayes, Bob Dickerson, Carol Britton

引用次数: 0

A bit-serial VLSI architecture for the 2-D discrete cosine transform 二维离散余弦变换的位串行VLSI结构

Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90050-7

Anna Tatsaki, Costas Goutis

引用次数: 0