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A graphical simulator for programmable logic controllers based on Petri nets 基于Petri网的可编程逻辑控制器图形模拟器
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(95)00031-3
H.A. Barker, P.W. Grant, J. Song
{"title":"A graphical simulator for programmable logic controllers based on Petri nets","authors":"H.A. Barker,&nbsp;P.W. Grant,&nbsp;J. Song","doi":"10.1016/0165-6074(95)00031-3","DOIUrl":"10.1016/0165-6074(95)00031-3","url":null,"abstract":"<div><p>In this paper an extended Petri net, the programmable logic controller net (PLCNet) is defined. A rule-based PLCNet simulator has been designed based on the semantics of PLCNets, with facilities provided to set up and control simulation. Both step and time responses are provided for the presentation of simulation results. A graphical environment is provided for the construction of the PLCNet, simulation and the presentation of simulation results.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 737-756"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00031-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114613380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A neural network-based replacement strategy for high performance computer architectures 基于神经网络的高性能计算机体系结构替换策略
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(95)00030-5
Humayun Khalid
{"title":"A neural network-based replacement strategy for high performance computer architectures","authors":"Humayun Khalid","doi":"10.1016/0165-6074(95)00030-5","DOIUrl":"10.1016/0165-6074(95)00030-5","url":null,"abstract":"<div><p>We propose a new scheme for the replacement of cache lines in high performance computer systems. Preliminary research, to date, indicates that neural networks (NNs) have great potential in the area of statistical predictions [1]. This attribute of neural networks is used in our work to develop a neural network-based replacement policy which can effectively eliminate dead lines from the cache memory by predicting the sequence of memory addresses referenced by the central processing unit (CPU) of a computer system. The proposed strategy may, therefore, provide better cache performance as compared to the conventional schemes, such as: LRU (Least Recently Used), FIFO (First In First Out), and MRU (Most Recently Used) algorithms. In fact, we observed from the simulation experiments that a carefully designed neural network-based replacement scheme does provide excellent performance as compared to the LRU scheme. The new approach can be applied to the page replacement and prefetching algorithms in virtual memory systems.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 691-702"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00030-5","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128179333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An improved algorithm for evaluation of the product of an exponential function with an error function complement 一种求指数函数与误差函数补乘积的改进算法
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(95)00026-7
R.J. Dewhurst, Q. Shan
{"title":"An improved algorithm for evaluation of the product of an exponential function with an error function complement","authors":"R.J. Dewhurst,&nbsp;Q. Shan","doi":"10.1016/0165-6074(95)00026-7","DOIUrl":"10.1016/0165-6074(95)00026-7","url":null,"abstract":"<div><p>Some mathematical CAD packages are inadequate in computing the composite functions involving the product of an exponential function and an error function complement. These functions arise in physical applications, such as problems in diffusion. Their importance warrants a composite treatment. If their component factors are computed individually, discontinuities in the evaluations arises, as shown in some CAD packages. An improved algorithm is presented which overcomes this deficiency, and provides a fast evaluation. Such evaluation is successful even using floating point numbers with single precision. The potential for numerical overflow associated with large arguments has been overcome.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 733-736"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00026-7","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130342215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Author index to volume 41 (1995/1996) 第41卷作者索引(1995/1996)
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/S0165-6074(96)90002-2
{"title":"Author index to volume 41 (1995/1996)","authors":"","doi":"10.1016/S0165-6074(96)90002-2","DOIUrl":"https://doi.org/10.1016/S0165-6074(96)90002-2","url":null,"abstract":"","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 771-772"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/S0165-6074(96)90002-2","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136636407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A hybrid distributed mutual exclusion algorithm 一种混合分布式互斥算法
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(96)00013-0
Ye-In Chang
{"title":"A hybrid distributed mutual exclusion algorithm","authors":"Ye-In Chang","doi":"10.1016/0165-6074(96)00013-0","DOIUrl":"https://doi.org/10.1016/0165-6074(96)00013-0","url":null,"abstract":"<div><p>This paper presents a hybrid approach to distributed mutual exclusion in which two algorithms are combined such that one minimizes message traffic and the other minimizes time delay. In a hybrid approach, sites are divided into groups, and two different algorithms are used to resolve local (intra-group) and global (inter-group) conflicts. In this paper, we develop a hybrid distributed mutual exclusion algorithm which uses Singhal's dynamic information structure algorithm [15] as the local algorithm to minimize time delay and Maekawa's algorithm [7] as the global algorithm to minimize message traffic. Compared to Maekawa's algorithm which needs <em>O</em>(√<em>N</em>) messages, but two time units delay between successive executions of the Critical Section (CS) (where <em>N</em> is the number of sites in the system), the proposed hybrid algorithm can reduce message traffic by 52% and time delay by 29% at the same time.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 715-731"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(96)00013-0","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136941058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mixing floating- and fixed-point formats for neural network learning on neuroprocessors 在神经处理器上混合浮点和定点格式的神经网络学习
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(96)00012-9
Davide Anguita , Benedict A. Gomes
{"title":"Mixing floating- and fixed-point formats for neural network learning on neuroprocessors","authors":"Davide Anguita ,&nbsp;Benedict A. Gomes","doi":"10.1016/0165-6074(96)00012-9","DOIUrl":"https://doi.org/10.1016/0165-6074(96)00012-9","url":null,"abstract":"<div><p>We examine the efficient implementation of back-propagation (BP) type algorithms on TO [3], a vector processor with a fixed-point engine, designed for neural network simulation. Using Matrix Back Propagation (MBP) [2]we achieve an asymptotically optimal performance on TO (about 0.8 GOPS) for both forward and backward phases, which is not possible with the standard on-line BP algorithm. We use a mixture of fixed- and floating-point operations in order to guarantee both high efficiency and fast convergence. Though the most expensive computations are implemented in fixed-point, we achieve a rate of convergence that is comparable to the floating-point version. The time taken for conversion between fixed- and floating-point is also shown to be reasonably low.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 757-769"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(96)00012-9","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91984007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Modelling and performance assessment of large ATM switching networks on loosely-coupled parallel processors 基于松耦合并行处理器的大型ATM交换网络建模与性能评估
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(96)00029-4
W. Liu , E. Dirkx , G. Petit , J. Tiberghien
{"title":"Modelling and performance assessment of large ATM switching networks on loosely-coupled parallel processors","authors":"W. Liu ,&nbsp;E. Dirkx ,&nbsp;G. Petit ,&nbsp;J. Tiberghien","doi":"10.1016/0165-6074(96)00029-4","DOIUrl":"10.1016/0165-6074(96)00029-4","url":null,"abstract":"<div><p>A parallel simulation tool has been developed with the aim of evaluating the performance of a class of ATM switching systems. In this paper, the class of ATM switching networks of interest and the corresponding modelling are addressed. An appropriate decomposition scheme is revealed with respect to the model being built. The performance of the parallel tool is examined, based on a scalable ATM switching network, by means of a loosely-coupled parallel computer system. A combination of general purpose and problem specific algorithms results in a high computational efficiency, portability and scalability.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 681-689"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(96)00029-4","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128760601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Subject index to volume 41 (1995/1996) 第41卷主题索引(1995/1996)
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/S0165-6074(96)90003-4
{"title":"Subject index to volume 41 (1995/1996)","authors":"","doi":"10.1016/S0165-6074(96)90003-4","DOIUrl":"https://doi.org/10.1016/S0165-6074(96)90003-4","url":null,"abstract":"","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 773-774"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/S0165-6074(96)90003-4","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"92111638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application specific conversation schemes for ADA programs 特定于ADA程序的应用程序对话方案
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/0165-6074(95)00014-3
Alexander Romanovsky
{"title":"Application specific conversation schemes for ADA programs","authors":"Alexander Romanovsky","doi":"10.1016/0165-6074(95)00014-3","DOIUrl":"10.1016/0165-6074(95)00014-3","url":null,"abstract":"<div><p>The paper considers a development of the conversation scheme version proposed by A. Clematis and V. Gianuzzi in <em>Microprocessing and Microprogramming</em> (Vol. 32, No. 1–5, 1991) [5] and <em>Computer Languages</em> (Vol. 18, No. 3, 1993) [6]. The authors discussed the methodology of using conversations within a conventional concurrent language (Ada), which makes the conversation scheme practical. In our paper we concentrate on the improvements for their scheme. We believe that it is important for the programmer to have more choice, and propose what could be called a library of schemes from which the appropriate scheme could be chosen depending on the application. We discuss ways of setting dynamically the number of processes participating in a conversation; of having different sets of servers involved in different alternates of the same conversation; of introducing a global acceptance test which would be more sophisticated; of increasing robustness of the conversation. All of these proposals are meant to be used within a conventional language.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 703-713"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00014-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134394587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Calendar of forthcoming conferences and events 即将召开的会议和活动日历
Microprocessing and Microprogramming Pub Date : 1996-06-01 DOI: 10.1016/S0165-6074(96)90004-6
{"title":"Calendar of forthcoming conferences and events","authors":"","doi":"10.1016/S0165-6074(96)90004-6","DOIUrl":"https://doi.org/10.1016/S0165-6074(96)90004-6","url":null,"abstract":"","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 775-776"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/S0165-6074(96)90004-6","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136617910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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