{"title":"基于神经网络的高性能计算机体系结构替换策略","authors":"Humayun Khalid","doi":"10.1016/0165-6074(95)00030-5","DOIUrl":null,"url":null,"abstract":"<div><p>We propose a new scheme for the replacement of cache lines in high performance computer systems. Preliminary research, to date, indicates that neural networks (NNs) have great potential in the area of statistical predictions [1]. This attribute of neural networks is used in our work to develop a neural network-based replacement policy which can effectively eliminate dead lines from the cache memory by predicting the sequence of memory addresses referenced by the central processing unit (CPU) of a computer system. The proposed strategy may, therefore, provide better cache performance as compared to the conventional schemes, such as: LRU (Least Recently Used), FIFO (First In First Out), and MRU (Most Recently Used) algorithms. In fact, we observed from the simulation experiments that a carefully designed neural network-based replacement scheme does provide excellent performance as compared to the LRU scheme. The new approach can be applied to the page replacement and prefetching algorithms in virtual memory systems.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 10","pages":"Pages 691-702"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00030-5","citationCount":"1","resultStr":"{\"title\":\"A neural network-based replacement strategy for high performance computer architectures\",\"authors\":\"Humayun Khalid\",\"doi\":\"10.1016/0165-6074(95)00030-5\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>We propose a new scheme for the replacement of cache lines in high performance computer systems. Preliminary research, to date, indicates that neural networks (NNs) have great potential in the area of statistical predictions [1]. This attribute of neural networks is used in our work to develop a neural network-based replacement policy which can effectively eliminate dead lines from the cache memory by predicting the sequence of memory addresses referenced by the central processing unit (CPU) of a computer system. The proposed strategy may, therefore, provide better cache performance as compared to the conventional schemes, such as: LRU (Least Recently Used), FIFO (First In First Out), and MRU (Most Recently Used) algorithms. In fact, we observed from the simulation experiments that a carefully designed neural network-based replacement scheme does provide excellent performance as compared to the LRU scheme. The new approach can be applied to the page replacement and prefetching algorithms in virtual memory systems.</p></div>\",\"PeriodicalId\":100927,\"journal\":{\"name\":\"Microprocessing and Microprogramming\",\"volume\":\"41 10\",\"pages\":\"Pages 691-702\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1016/0165-6074(95)00030-5\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microprocessing and Microprogramming\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/0165607495000305\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microprocessing and Microprogramming","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/0165607495000305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A neural network-based replacement strategy for high performance computer architectures
We propose a new scheme for the replacement of cache lines in high performance computer systems. Preliminary research, to date, indicates that neural networks (NNs) have great potential in the area of statistical predictions [1]. This attribute of neural networks is used in our work to develop a neural network-based replacement policy which can effectively eliminate dead lines from the cache memory by predicting the sequence of memory addresses referenced by the central processing unit (CPU) of a computer system. The proposed strategy may, therefore, provide better cache performance as compared to the conventional schemes, such as: LRU (Least Recently Used), FIFO (First In First Out), and MRU (Most Recently Used) algorithms. In fact, we observed from the simulation experiments that a carefully designed neural network-based replacement scheme does provide excellent performance as compared to the LRU scheme. The new approach can be applied to the page replacement and prefetching algorithms in virtual memory systems.