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Microprocessing and Microprogramming最新文献

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A knowledge based approach to loop restructuring 基于知识的循环重构方法
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90038-8
J.C. Quill , P. Milligan , R.K. McConnell
{"title":"A knowledge based approach to loop restructuring","authors":"J.C. Quill ,&nbsp;P. Milligan ,&nbsp;R.K. McConnell","doi":"10.1016/0165-6074(94)90038-8","DOIUrl":"10.1016/0165-6074(94)90038-8","url":null,"abstract":"<div><p>Advances in technology have resulted in teh development of many different multiprocessor systems. Unfortunately these have not been accompanied by advances in portable, user-friendly program development environments. This paper looks at the major problems facing designers of such development environments, overviews the FortPort project that aims to overcome these problems and looks at the application of knowledge based techniques to the core migration and development topic of loop restructuring.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 773-776"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90038-8","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134182505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A worst case timing analysis technique for instruction prefetch buffers 指令预取缓冲区的最坏情况时序分析技术
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90017-5
Minsuk Lee , Sang Lyul Min, Chong Sang Kim
{"title":"A worst case timing analysis technique for instruction prefetch buffers","authors":"Minsuk Lee ,&nbsp;Sang Lyul Min,&nbsp;Chong Sang Kim","doi":"10.1016/0165-6074(94)90017-5","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90017-5","url":null,"abstract":"<div><p>Predictable performance is crucial for real-time computing systems. We propose a buffered threaded prefetch scheme as a predictable and high performance instruction memory hierarchy. We also give extensions to the timing schema[3] to analyze the timing effects of the proposed scheme. In the extended timing schema, we associate with each program construct what we call a WCTA (Worst Case Timing Abstraction), which contains detailed timing information of the program construct. By defining a concatenation operation on WCTAs, our revised timing schema accurately accounts for the timing effects of the buffered threaded prefetching not only within but also across program constructs. This paper shows, through analysis using a timing tool based on the extended timing schema, the buffered prefetch scheme significantly improves the worst case execution times of tasks.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 681-684"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90017-5","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72293897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Validation of abstract test suites with use of SDL 使用SDL验证抽象测试套件
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90024-8
Mária Törő , Gábor Ziegler
{"title":"Validation of abstract test suites with use of SDL","authors":"Mária Törő ,&nbsp;Gábor Ziegler","doi":"10.1016/0165-6074(94)90024-8","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90024-8","url":null,"abstract":"","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 711-714"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90024-8","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72293929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Image coding using vector quantization of wavelet coefficients 图像编码使用矢量量化的小波系数
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90071-X
Chrissavgi Dre, George Branis, Costas Goutis
{"title":"Image coding using vector quantization of wavelet coefficients","authors":"Chrissavgi Dre,&nbsp;George Branis,&nbsp;Costas Goutis","doi":"10.1016/0165-6074(94)90071-X","DOIUrl":"10.1016/0165-6074(94)90071-X","url":null,"abstract":"<div><p>In this paper, we introduce a new image compression scheme that it involves three steps: First a multiresolution decomposition of the images is performed using the Wavelet Transform (WT). A thresholding algorithm is then used for the wavelet coefficients. Finally, the coefficients derived from the second step are vector quantized using a multiresoltuion codebook. The LGB algorithm is used for the Vector Quantization (VQ). Our experimental results showed that the Lena image can be coded by a two-level system at the rate of 0.24 bpp having a <em>PSNR</em> of 30.40 <em>db</em>.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 927-930"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90071-X","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123016322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Towards a definition of benchmarks for parallel computers dedicated to image processing/understanding 对用于图像处理/理解的并行计算机的基准进行定义
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90040-X
Patrick Bonnin , Edwige E. Pissaloux , T. Dillon
{"title":"Towards a definition of benchmarks for parallel computers dedicated to image processing/understanding","authors":"Patrick Bonnin ,&nbsp;Edwige E. Pissaloux ,&nbsp;T. Dillon","doi":"10.1016/0165-6074(94)90040-X","DOIUrl":"10.1016/0165-6074(94)90040-X","url":null,"abstract":"<div><p>This paper presents an effort to define a method for evaluation of parallel architectures dedicated to vision. A definition of the benchmark concept, and a characterisation of a standard set of general-purpose vision algorithms which could constitue a benchmark are proposed. These algorithms are independent of machine architecture, environments, programming models and parallelisation techniques supported. A detailed example illustrating the proposed approach is given.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 783-787"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90040-X","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129332353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Multiprocessor flight data acquisition system 多处理器飞行数据采集系统
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90058-2
Zdenek Blazek
{"title":"Multiprocessor flight data acquisition system","authors":"Zdenek Blazek","doi":"10.1016/0165-6074(94)90058-2","DOIUrl":"10.1016/0165-6074(94)90058-2","url":null,"abstract":"<div><p>This submission describes a system of data entry and acquisition for monitoring and diagnostics of aircraft. We shall discuss a four processor system in which single processors communicate with each other via serial links. All important parts will be described in following paragraphs.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 871-874"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90058-2","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130805101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Measurements in software requirements specification process 软件需求规范过程中的度量
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90063-9
J. Györkös
{"title":"Measurements in software requirements specification process","authors":"J. Györkös","doi":"10.1016/0165-6074(94)90063-9","DOIUrl":"10.1016/0165-6074(94)90063-9","url":null,"abstract":"<div><p>We are seeking to find measures of risk that can be used by management and the developers. We will show which characteristics and constraints could be assessed directly from the requirements specification document in the form of numeric values. These numeric must be normalised and used in a comparative manner with other events in the software development process. The required characteristics — the specific risks — will be expressed by the proposed metrics. The construction of a database with requirements analysis process data is emphasised as a testbed for metrics evaluation. In summary our approach is as follows: First decide what the important areas of risk are, then identify attributes available in a CASE (Computer Aided Software engineering) repository that may give an insight into these risks and then combine these attributes to provide risk measures.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 893-896"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90063-9","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73443882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Cost-optimal dynamic data replication for distributed database systems: DYVO 分布式数据库系统的成本最优动态数据复制：DYVO
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90032-9
Youngkon Lee, Songchun Moon
{"title":"Cost-optimal dynamic data replication for distributed database systems: DYVO","authors":"Youngkon Lee,&nbsp;Songchun Moon","doi":"10.1016/0165-6074(94)90032-9","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90032-9","url":null,"abstract":"<div><p>In this paper, we present a dynamic replication algorithm, DYVO, which could provide an optimal cost for operating replicas according to a read/write pattern of transactions. Unlike previous algorithms for dynamic replication, in which <em>read one and write all available</em> approach is used for preserving consistency of replicas, DYVO basically uses <em>quorum</em> approach for managing replicas. The quorum approach is basically able to encompass a large class of failures. Moreover, the quorum approach simplifies considerably the task maintaining the consistency of replicated data. As a result, DYVO is fault-tolerant to all kinds of failures and gives a way that minimizes overload for managing a replication algorithm.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 747-750"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90032-9","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72207469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs 高级体系结构综合：数据流图中的优先级分析和自动循环检测
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90020-5
Anna Antola , Fausto Distante , Andrea Marches
{"title":"High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs","authors":"Anna Antola ,&nbsp;Fausto Distante ,&nbsp;Andrea Marches","doi":"10.1016/0165-6074(94)90020-5","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90020-5","url":null,"abstract":"<div><p>In this paper a low complexity procedure for precedence analysis and cycle detection in DFGs, representing abstract architectures during the high level synthesis process, is presented. The proposed approach aims to reduce the computational overhead required to take topological constraints into consideration during the scheduling process.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 693-696"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90020-5","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72283386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ASI Instrumentation ASI仪器
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90060-4
Miroslav Švéda, Radimír Vrba, Pavel Legát, František Zezulka
{"title":"ASI Instrumentation","authors":"Miroslav Švéda,&nbsp;Radimír Vrba,&nbsp;Pavel Legát,&nbsp;František Zezulka","doi":"10.1016/0165-6074(94)90060-4","DOIUrl":"10.1016/0165-6074(94)90060-4","url":null,"abstract":"<div><p>Network monitors for low-level, real-time networks should provide useful development and maintenance tools. The presented ASI (Actuator/Sensor Interface) Monitor exemplifies the means for simple digital actuator/sensor-to-controller interconnections. This paper mentions the ASI standard and, next, the two ASI-dedicated monitor implementations, which aspire to meet support needs for the lowest field level.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 879-882"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90060-4","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122819863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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