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Microprocessing and Microprogramming最新文献

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Extending database programming language with declarative querying facilities 使用声明式查询功能扩展数据库编程语言
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90066-3
Iztok Savnik , Tomaž Mohorič , Vanja Josifovski
{"title":"Extending database programming language with declarative querying facilities","authors":"Iztok Savnik ,&nbsp;Tomaž Mohorič ,&nbsp;Vanja Josifovski","doi":"10.1016/0165-6074(94)90066-3","DOIUrl":"10.1016/0165-6074(94)90066-3","url":null,"abstract":"<div><p>The query language OVAL which is intended for the integration with the database programming language based on C++ is proposed in this paper. The work addresses the <em>impedance mismatch</em> problem [1] between the syntax and the semantics of the programming and query language. The query language OVAL is based on the functional query language FQL [3] extending it for the manipulation of complex objects. The salient features of the OVAL query language are: (i) functional nature of the query language, which makes the language suitable for the integration with the procedural programming languages and provides modular style of query definition, (ii) the use of schema information for expressing queries and (iii) recursive evaluation of the algebraic operations on set structured complex objects.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 905-908"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90066-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123985526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An efficient critical path tracing algorithm for sequential circuits 一种有效的顺序电路关键路径跟踪算法
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90068-X
Hoon Chang , Jacob A. Abraham
{"title":"An efficient critical path tracing algorithm for sequential circuits","authors":"Hoon Chang ,&nbsp;Jacob A. Abraham","doi":"10.1016/0165-6074(94)90068-X","DOIUrl":"10.1016/0165-6074(94)90068-X","url":null,"abstract":"<div><p>Several timing verification algorithms for combinational circuits have been proposed in the last few years. However, similar algorithms do not exist for sequential circuits. Existing algorithms have difficulty in performing timing verification even for combinational circuits due to the excessive computation time and memory requirement for identifying the critical path. This paper presents a critical path analysis algorithm for sequential circuits. The algorithm can be used to identify the critical path of a sequential circuit while considering exact operation of the circuit without assuming the use of scan techniques. The input sequence which sensitizes the critical path is determined as well.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 913-916"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90068-X","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128967201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On the optimal mapping of fuzzy rules on standard micro-controllers 标准微控制器上模糊规则的最优映射
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90021-3
Jos Nijhuis , Herman van Aartsen, Emilija Barakova, Walter Jansen, Ben Spaanenburg
{"title":"On the optimal mapping of fuzzy rules on standard micro-controllers","authors":"Jos Nijhuis ,&nbsp;Herman van Aartsen,&nbsp;Emilija Barakova,&nbsp;Walter Jansen,&nbsp;Ben Spaanenburg","doi":"10.1016/0165-6074(94)90021-3","DOIUrl":"10.1016/0165-6074(94)90021-3","url":null,"abstract":"<div><p>Once a fuzzy controller is specified by a rule-set, it can be implemented in dedicated hardware or as a software program. For industrial applications, an inexpensive micro-controller with limited resources is often selected. The implementation (or mapping) issue then leads to a tradeoff between operation speed and memory usage. This paper presents a set of basic transformation rules that allows the designer to optimize such a mapping.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 697-700"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90021-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126006069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Reduction of fault detection costs through a BDD formalism 通过BDD形式降低故障检测成本
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90052-3
Fabrizio Ferrandi
{"title":"Reduction of fault detection costs through a BDD formalism","authors":"Fabrizio Ferrandi","doi":"10.1016/0165-6074(94)90052-3","DOIUrl":"10.1016/0165-6074(94)90052-3","url":null,"abstract":"<div><p>The paper presents a methodology for an efficient testability analysis of complex VLSI circuit. It is based on controllability/observability evaluation using Binary Decision Diagrams (BDD). Efficiency is improved by intelligent use of intermediate results.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 841-844"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90052-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123714721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Proving properties of a new high speed data bus with predicate/transition nets 用谓词/转换网络证明一种新型高速数据总线的性能
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90041-8
T. Pyssysalo
{"title":"Proving properties of a new high speed data bus with predicate/transition nets","authors":"T. Pyssysalo","doi":"10.1016/0165-6074(94)90041-8","DOIUrl":"10.1016/0165-6074(94)90041-8","url":null,"abstract":"<div><p><em>Frame Synchronized Ring (FSR-bus)</em> is a new high speed interconnection network, developed for a wide range of real time applications. The <em>medium access control (MAC)</em> algorithm of the FSR has been analyzed with analytical models and simulations. However, these methods have not been powerful enough for proving some interesting properties of the algorithm. In this paper we explain, how <em>predicate/transition (Pr/T) nets</em> can be used in the modeling of the FSR-bus. In addition, we prove the deadlock freeness and the fairness of the MAC by analyzing the Pr/T-net model of the FSR.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 791-794"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90041-8","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122224101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Using versioned object-oriented data in programming languages 在编程语言中使用版本化的面向对象数据
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90065-5
Jarogniew Rykowski, Waldemar Wieczerzycki
{"title":"Using versioned object-oriented data in programming languages","authors":"Jarogniew Rykowski,&nbsp;Waldemar Wieczerzycki","doi":"10.1016/0165-6074(94)90065-5","DOIUrl":"10.1016/0165-6074(94)90065-5","url":null,"abstract":"<div><p>The problem of accessing object versions from object-oriented programming language is discussed. Different approaches to consistency checking are discussed and compared. Some extensions to object-oriented languages are proposed to make it possible to version objects both at the compilation time and the application run-time.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 901-904"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90065-5","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120884740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Database cache requirements calculation using near-line data access traces in a 500+ user transaction system 在500+用户事务系统中使用近行数据访问跟踪计算数据库缓存需求
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90037-X
Franz Schönbauer
{"title":"Database cache requirements calculation using near-line data access traces in a 500+ user transaction system","authors":"Franz Schönbauer","doi":"10.1016/0165-6074(94)90037-X","DOIUrl":"10.1016/0165-6074(94)90037-X","url":null,"abstract":"<div><p>A pragmatic way is shown to calculate database cache sizes for a given desired level of cache performance, without use of application information. Treating applications as black boxes allows focusing on higher order structures of database accesses to classify applications. Online tracing of all database accesses allows a near-line simulation of cache performance for various cache sizes. These simulations result in typical patterns for application groups which point to areas with strong gradients in the relation between cache size and cache efficiency which can be exploited. The near-line-ness of this calculation lends itself to automatic adaptive cache size regulation.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 769-772"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90037-X","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129506426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Concurrency control scheme in multi-level secure database management systems 多级安全数据库管理系统中的并发控制方案
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90029-9
Yonglak Sohn, Sukhoon Kang, Songchun Moon
{"title":"Concurrency control scheme in multi-level secure database management systems","authors":"Yonglak Sohn,&nbsp;Sukhoon Kang,&nbsp;Songchun Moon","doi":"10.1016/0165-6074(94)90029-9","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90029-9","url":null,"abstract":"<div><p>The most critical problem associated with implementing in <strong>multi-level secure database management systems (MLS/DBMSs)</strong> is a correct concurrency control under the constraints of multilevel security. This paper provides two concurrency control schemes, one based on <em>multiversion</em> scheme and the other based on the <em>two-phase locking</em> scheme.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 733-736"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90029-9","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72293894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
HLL enhancement for stack based processors 基于堆栈的处理器的HLL增强
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90018-3
C. Bailey, R. Sotudeh
{"title":"HLL enhancement for stack based processors","authors":"C. Bailey,&nbsp;R. Sotudeh","doi":"10.1016/0165-6074(94)90018-3","DOIUrl":"https://doi.org/10.1016/0165-6074(94)90018-3","url":null,"abstract":"<div><p>Stack machines, or stack based processors, have long been pigeon-holed as FORTH processors; specialised devices with little relevance for high level language applications. The failure of stack machines to address the issue of high level language support, and C in particular, has prevented wider acceptance of this promising technology despite the potential benefits of simpler hardware and low gate counts. Our research has centred upon eliminating cache and memory dependence, reducing the limits imposed by external bandwidths<span><sup>◊</sup></span>. Having previously introduced a compact multiple-instruction-per-word stack-based encoding strategy in [Bailey93a], we now present a revised model, assessing its performance with compiled C benchmarks<span><sup>⧫</sup></span>, and stressing minimisation of memory dependence.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 685-688"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90018-3","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72293896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Clock cycle estimation based on dead time and control unit area minimization 基于死区时间和控制单元面积最小化的时钟周期估计
Microprocessing and Microprogramming Pub Date : 1994-12-01 DOI: 10.1016/0165-6074(94)90048-5
H. Mecha, M. Fernández, R. Hermida, D. Mozos, K. Olcoz
{"title":"Clock cycle estimation based on dead time and control unit area minimization","authors":"H. Mecha,&nbsp;M. Fernández,&nbsp;R. Hermida,&nbsp;D. Mozos,&nbsp;K. Olcoz","doi":"10.1016/0165-6074(94)90048-5","DOIUrl":"10.1016/0165-6074(94)90048-5","url":null,"abstract":"<div><p>This paper presents a method to estimate the clock cycle, taking into account the dead times of the operators, that influences the total execution time, and the number of control steps, that settles the control unit size. It accepts a module library and it considers the area importance versus time importance depending on user constraints.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"40 10","pages":"Pages 821-824"},"PeriodicalIF":0.0,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(94)90048-5","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128685524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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