Microprocessing and Microprogramming最新文献_第6页

On the routing of signals in parallel processor meshes 并行处理器网格中信号路由的研究

Microprocessing and Microprogramming Pub Date : 1995-05-01 DOI: 10.1016/0165-6074(94)00090-W

Constantinos V. Papadopoulos

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引用次数: 0

Heuristic and neural algorithms for mapping tasks to a reconfigurable array 将任务映射到可重构数组的启发式和神经算法

Microprocessing and Microprogramming Pub Date : 1995-05-01 DOI: 10.1016/0165-6074(95)00007-B

C.P. Ravikumar , Naresh Vedi

{"title":"Heuristic and neural algorithms for mapping tasks to a reconfigurable array","authors":"C.P. Ravikumar , Naresh Vedi","doi":"10.1016/0165-6074(95)00007-B","DOIUrl":"10.1016/0165-6074(95)00007-B","url":null,"abstract":"<div>We consider the problem of mapping tasks onto processors in a reconfigurable array architecture. We assume a directed acyclic task graph as input. The node weights in the task graph represent their computational requirement; the weight on an edge (i, j) is an estimate of the communication requirement between tasks i and j. The problem is to (a) estimate the minimum number of processors p to execute all the tasks with the highest possible efficiency, (b) bind each task to a processor, (c) schedule the tasks within each processor, and (d) carry out link allocation among processors. We assume a realistic model of reconfigurable parallel processors, where each processor can be connected to at most d other processors through bidirectional links. The objective of the problem is to minimize the total overall execution time, which includes the time spent by the processors in computation, communication, and idling. The mapping problem is computationally hard, and we present two algorithms for obtaining near-optimal solutions. The first algorithm is a heuristic algorithm based on the critical path method and as soon as possible scheduling. The second algorithm uses the Boltzmann machine model of artificial neural networks to solve the mapping problem. We have implemented both the algorithms on a Sun/SPARC workstation. Experimental results on a set of benchmark problems indicate that the neural algorithm generates better solutions than the heuristic algorithm, but takes significantly larger amounts of time than the latter. The number of neurons required in the algorithm is equal to n.p and hence the connection matrix is np × np; thus the neural algorithm is also memory intensive and I/O intensive due to swapping. We have devised a parallel divide-and-conquer algorithm which decomposes a large mapping problem into several smaller ones and solves the subproblems concurrently on a network of Sun workstations.</div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 2","pages":"Pages 137-151"},"PeriodicalIF":0.0,"publicationDate":"1995-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)00007-B","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121795005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A new approach to schedule operations across nested-ifs and nested-loops 跨嵌套if和嵌套循环调度操作的新方法

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(94)00024-5

Shih-Hsu Huang , Cheng-Tsung Hwang , Yu-Chin Hsu , Yen-Jen Oyang

引用次数: 3

Letter from the editors-in-chief 总编的来信

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(95)90006-3

Mariagiovanna Sami (Editor-in-Chief), Lutz Richter (Editor-in-Chief)

引用次数: 0

A parallel SVD algorithm and its application to financial ratio analysis 并行奇异值分解算法及其在财务比率分析中的应用

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(94)00025-6

Robert Manger , Mladen Grbić , Vito Leornardo Plantamura , Branko Souček

引用次数: 3

A survey of languages integrating functional, object-oriented and logic programming 集函数式、面向对象和逻辑程序设计于一体的语言综述

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(94)00017-5

K.W. Ng , C.K. Luk

引用次数: 9

Calendar of forthcoming conference and events 即将召开的会议和活动日历

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(95)90007-1

引用次数: 0

A genetic algorithm-based circuit partitioner for MCMs 一种基于遗传算法的mcm电路分割器

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(94)00089-S

Ananta K. Majhi , L.M. Patnaik , Srilata Raman

引用次数: 10

Performance evaluation in image processing with GAPP array processor GAPP阵列处理器在图像处理中的性能评价

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(94)00088-R

Philippe O.A. Navaux , César A.F. De Rose , Gerson G.H. Cavalheiro

引用次数: 5

Stable memory for a disk write cache 磁盘写缓存的稳定内存

Microprocessing and Microprogramming Pub Date : 1995-04-01 DOI: 10.1016/0165-6074(95)90627-O

B.A. Coghlan, J.O. Jones

引用次数: 1