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IEEE Transactions on Signal and Power Integrity最新文献

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Investigation of Voltage Regulator Module (VRM)-Induced Noise to High-Speed Signals With VRM via Design Factors 通过设计因素调查稳压器模块（VRM）对高速信号产生的噪声
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-03-29 DOI: 10.1109/TSIPI.2024.3407030
Junho Joo;Manish K. Mathew;Arun Chada;Soumya Singh;Seema PK;Bhyrav Mutnury;DongHyun Kim
{"title":"Investigation of Voltage Regulator Module (VRM)-Induced Noise to High-Speed Signals With VRM via Design Factors","authors":"Junho Joo;Manish K. Mathew;Arun Chada;Soumya Singh;Seema PK;Bhyrav Mutnury;DongHyun Kim","doi":"10.1109/TSIPI.2024.3407030","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3407030","url":null,"abstract":"As the complexity of server platforms increases, the noise produced by switching voltage regulator modules (VRMs) is more likely to be coupled to nearby high-speed traces. This study aims to investigate the mechanism of noise coupling between the noise generated by a VRM and a high-speed signal trace, as well as to evaluate various noise-reduction methods. A VRM's rapid switching of field effect transistors generates an unintentional coupling region that primarily injects noise into high-speed traces routed in the inner signal layers of the printed circuit boards (PCBs) in server platforms. To analyze various VRM noise coupling mechanisms in practical high-speed channels, a simplified PCB design based on a high-speed server platform is designed and fabricated. In addition, case studies are conducted under various conditions to validate the most efficient VRM noise coupling reduction method by both simulation and measurement. Finally, various design factors that influence VRM noise coupling are evaluated to propose guidelines for high-speed channel designers. This study presents the first comprehensive analysis of different noise coupling mechanisms and an IR drop aware guideline to reduce noise in dense high-speed systems containing a VRM.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"97-109"},"PeriodicalIF":0.0,"publicationDate":"2024-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141319673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Perturbed Pin Map Design for Low Differential Crosstalk in 112 Gb/s PAM4 Applications 在 112 Gb/s PAM4 应用中实现低差分串扰的扰动引脚图设计
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-03-10 DOI: 10.1109/TSIPI.2024.3399099
Mu-Shui Zhang;Yingfeng Ding;Zixin Wang
{"title":"Perturbed Pin Map Design for Low Differential Crosstalk in 112 Gb/s PAM4 Applications","authors":"Mu-Shui Zhang;Yingfeng Ding;Zixin Wang","doi":"10.1109/TSIPI.2024.3399099","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3399099","url":null,"abstract":"As the wired communication data rate increases up to 112 Gb/s and even higher, the differential crosstalk from neighboring pairs becomes much more serious and could significantly deteriorate signal integrity. In this article, a perturbed pin map design method is proposed to reduce the differential crosstalk for 112 Gb/s four-level pulse amplitude modulation applications. Three physical parameters, the distance of two signal pins in a pair, the angle of two adjacent signal pairs, and the positions of surrounding ground vias, are perturbed for maximum crosstalk reduction. Without changing the signal-to-ground ratio and area per differential pair, the proposed pin map patterns can significantly mitigate the total differential crosstalk in via connection field, by both common-mode cancelation enhancement of signal vias and shielding effect improvement of ground vias through perturbation. Numerical examples are performed to verify the validity of crosstalk reduction in both square and triangular pin arrays. Finally, the effect of perturbation amplitude on crosstalk reduction is analyzed; it is shown that differential crosstalk decreases fast when the perturbed offset is smaller than 2\u0000<italic>r</i>\u0000 (\u0000<italic>r</i>\u0000 is the radius of balls), and it becomes slow when the perturbed offset is larger than \u0000<italic>2r</i>\u0000. Compared with the nonperturbed square and triangular patterns, the integrated crosstalk noises of the perturbed patterns are reduced by 70.62% and 68.72%, respectively, at 112 Gb/s, and the insertion loss to crosstalk ratios are averagely increased by 11 dB and 8 dB, respectively, up to 40 GHz, with a perturbed offset of 2\u0000<italic>r</i>\u0000.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"85-96"},"PeriodicalIF":0.0,"publicationDate":"2024-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141245180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Eye Estimation Methods for MIPI C-PHY MIPI C-PHY 的眼球估计方法
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-03-03 DOI: 10.1109/TSIPI.2024.3396436
Yu-Ying Cheng;Pei-Yang Weng;Suani-Kai Yang;Shih-Hsien Wu;Tzong-Lin Wu
{"title":"Eye Estimation Methods for MIPI C-PHY","authors":"Yu-Ying Cheng;Pei-Yang Weng;Suani-Kai Yang;Shih-Hsien Wu;Tzong-Lin Wu","doi":"10.1109/TSIPI.2024.3396436","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3396436","url":null,"abstract":"Mobile industry processor interface (MIPI) C-PHY is a signal transmission interface with three-phase encoding technology on the three-wire high-speed channel. The traditional method of superposition to generate an eye diagram on this kind of channel is time-consuming. The novel eye estimation methods for the C-PHY protocol are proposed. A new greedy algorithm and dynamic programming method are proposed to predict the worst-case eye diagram, respectively. The accuracy and efficiency of these two methods are compared. In addition, the algorithms for estimating the statistical eye diagram of MIPI C-PHY with and without considering the driver nonlinearity are also proposed and compared respectively. All the proposed algorithms are validated by experimental measurement. The excellent agreement could be well seen.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"75-84"},"PeriodicalIF":0.0,"publicationDate":"2024-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140948956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variability-Aware Modeling of Power Supply Induced Jitter 电源诱导抖动的可变性感知建模
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-02-16 DOI: 10.1109/TSIPI.2024.3366499
Vinod Kumar Verma;Jai Narayan Tripathi
{"title":"Variability-Aware Modeling of Power Supply Induced Jitter","authors":"Vinod Kumar Verma;Jai Narayan Tripathi","doi":"10.1109/TSIPI.2024.3366499","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3366499","url":null,"abstract":"This work presents a comprehensive study on the impact of variability on jitter in CMOS integrated circuits. As a case study, an analytical model of a CMOS inverter has been developed, and the input–output relationship is derived considering the effect of power supply noise, variations in design parameters due to fabrication process inaccuracies, and temperature. These parameters are taken as random variables, and the timing deviation in the transition edges of the output response has been modeled analytically. The proposed approach has been validated using numerical examples by comparing results obtained from the proposed analysis with the results obtained from the SPICE-based simulator. A couple of measurement examples and an application case study are also presented to validate the state-of-the-art investigation. The considered examples and application case study suggest the importance of the current study to ensure the timing budget of a system. The proposed approach can be used to estimate critical variability issues affecting the timing budgets of the systems.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"47-55"},"PeriodicalIF":0.0,"publicationDate":"2024-02-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140291213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hybrid Signal Integrity Modeling and Analysis of Heterogeneous Integrated System With Neuromorphic Darwin Chip 带有神经形态达尔文芯片的异构集成系统的混合信号完整性建模与分析
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-02-06 DOI: 10.1109/TSIPI.2024.3362317
Quankun Chen;Hanzhi Ma;Da Li;Tuomin Tao;Shurun Tan;En-Xiao Liu;Jose Schutt-Aine;Er-Ping Li
{"title":"Hybrid Signal Integrity Modeling and Analysis of Heterogeneous Integrated System With Neuromorphic Darwin Chip","authors":"Quankun Chen;Hanzhi Ma;Da Li;Tuomin Tao;Shurun Tan;En-Xiao Liu;Jose Schutt-Aine;Er-Ping Li","doi":"10.1109/TSIPI.2024.3362317","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3362317","url":null,"abstract":"This article introduces a comprehensive approach for designing and analyzing signal integrity in heterogeneous integrated systems that incorporate neuromorphic Darwin chips. The proposed integrated system architecture includes a neuromorphic Darwin chip, digital signal processing unit, microcontroller unit, field programmable gate arrays, and coding and decoding modules to encode and reconstruct analog spiking signals. The study evaluates the encoding module and the heterogeneous integration structure and conducts signal integrity analysis. To achieve optimal signal integrity performance, the article proposes a novel binocular eye diagram analysis technique. This innovative approach guides the encoding algorithm modification and improves the overall system performance. This research is the first to combine joint field-circuit simulation, heterogeneous integration modeling, and signal integrity analysis of the Darwin neuromorphic chip, and it is expected to serve as a valuable reference for future studies on similar systems.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"37-46"},"PeriodicalIF":0.0,"publicationDate":"2024-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139987179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extraction of Transmission Line Surface Roughness Using S-Parameter Measurements and Cross-Sectional Information 利用 S 参数测量和横截面信息提取输电线表面粗糙度
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-02-05 DOI: 10.1109/TSIPI.2024.3361863
Ze Sun;Jian Liu;Xiaoyan Xiong;DongHyun Kim;Daryl Beetner;Victor Khilkevich
{"title":"Extraction of Transmission Line Surface Roughness Using S-Parameter Measurements and Cross-Sectional Information","authors":"Ze Sun;Jian Liu;Xiaoyan Xiong;DongHyun Kim;Daryl Beetner;Victor Khilkevich","doi":"10.1109/TSIPI.2024.3361863","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3361863","url":null,"abstract":"The intentional roughness created on conductor surfaces during the printed circuit board (PCB) manufacturing process leads to a substantial increase of conductor loss at frequencies in the order of tens of gigahertz. It is essential to know the roughness of PCB conductors to create adequate models of the high-speed channels. This article presents a novel method for extracting the roughness level of conductor foils using only measured \u0000<italic>S</i>\u0000-parameters and cross-sectional information. The proposed technique is relatively easy to perform, cost-effective, and does not require the destruction of test boards, making it a promising alternative to existing methods that rely on optical or scanning electron microscope imaging. Besides, the proposed method can handle boards with nonequal roughness on different conductor surfaces, which is common in PCBs. The method is validated through both simulation and measurement, and a good correlation is achieved between the extracted roughness level and the values obtained by microscopic imaging.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"30-36"},"PeriodicalIF":0.0,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139916584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IBIS Model Simulation Accuracy Improvement by Including Power-Supply-Induced Jitter Effect 通过纳入电源引起的抖动效应提高 IBIS 模型模拟精度
IEEE Transactions on Signal and Power Integrity Pub Date : 2024-01-04 DOI: 10.1109/TSIPI.2023.3349229
Yifan Ding;Yin Sun;Randy Wolff;Zhiping Yang;Chulsoon Hwang
{"title":"IBIS Model Simulation Accuracy Improvement by Including Power-Supply-Induced Jitter Effect","authors":"Yifan Ding;Yin Sun;Randy Wolff;Zhiping Yang;Chulsoon Hwang","doi":"10.1109/TSIPI.2023.3349229","DOIUrl":"https://doi.org/10.1109/TSIPI.2023.3349229","url":null,"abstract":"The power-aware input/output buffer information specification (IBIS) model does not correctly account for the delay change caused by supply-voltage noise. This article presents a new modification algorithm that improves the accuracy of the IBIS model by including the power-supply-induced jitter (PSIJ) sensitivity effect; more specifically, the dc-jitter-sensitivity effect. The procedure of extracting the key parameters and modifying the switching coefficients is presented and applied in a real design. The performance of the modified IBIS model is validated using two designs, and the simulation accuracy is improved significantly compared with that of the traditional IBIS model. The improved IBIS model is applicable to situations when there is dc or ac noise on the power rail. The predriver propagation delay can also be characterized in the simulation by including the predriver PSIJ effect. The algorithm is efficient while straightforward and easily implemented by introducing just one parameter to the IBIS model.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"21-29"},"PeriodicalIF":0.0,"publicationDate":"2024-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139710539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
2023 Index IEEE Transactions on Signal and Power Integrity Vol. 2 2023 索引 IEEE 信号与电源完整性论文集第 2 卷
IEEE Transactions on Signal and Power Integrity Pub Date : 2023-12-28 DOI: 10.1109/TSIPI.2023.3348197
{"title":"2023 Index IEEE Transactions on Signal and Power Integrity Vol. 2","authors":"","doi":"10.1109/TSIPI.2023.3348197","DOIUrl":"https://doi.org/10.1109/TSIPI.2023.3348197","url":null,"abstract":"","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"2 ","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2023-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10375861","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139060271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Electromagnetic Compatibility Society Information 电气和电子工程师学会电磁兼容性协会信息
IEEE Transactions on Signal and Power Integrity Pub Date : 2023-12-21 DOI: 10.1109/TSIPI.2023.3343021
{"title":"IEEE Electromagnetic Compatibility Society Information","authors":"","doi":"10.1109/TSIPI.2023.3343021","DOIUrl":"https://doi.org/10.1109/TSIPI.2023.3343021","url":null,"abstract":"","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2023-12-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10368591","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139034234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Characterization of a Microstrip Line Referenced to a Meshed Return Plane Using 2-D Analysis 使用二维分析法确定以网格回波平面为基准的微带线的特性
IEEE Transactions on Signal and Power Integrity Pub Date : 2023-12-05 DOI: 10.1109/TSIPI.2023.3339445
Ze Sun;Jian Liu;Xiaoyan Xiong;DongHyun Kim;Daryl Beetner;Victor Khilkevich
{"title":"Characterization of a Microstrip Line Referenced to a Meshed Return Plane Using 2-D Analysis","authors":"Ze Sun;Jian Liu;Xiaoyan Xiong;DongHyun Kim;Daryl Beetner;Victor Khilkevich","doi":"10.1109/TSIPI.2023.3339445","DOIUrl":"https://doi.org/10.1109/TSIPI.2023.3339445","url":null,"abstract":"Transmission lines with meshed return planes offer enhanced flexibility but can introduce signal integrity challenges. Characterizing such transmission lines using full-wave simulation is accurate but time and resource intensive. In response, an efficient modeling method using 2-D analysis is proposed in this article. First, cross sections of the transmission line are taken at multiple locations to create a sampled representation of the changing geometry. The per-unit-length (PUL) RLGC parameters of each segment are obtained using 2-D analysis. The value of the inductance obtained from the 2-D analysis is then modified to account for the position-dependent current direction on the return plane. Finally, the segments are cascaded together to obtain the \u0000<inline-formula><tex-math>$S$</tex-math></inline-formula>\u0000-parameters of the transmission line. The results obtained using this method closely align with those from 3-D full-wave simulations, demonstrating the effectiveness and efficiency of the proposed approach.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"13-20"},"PeriodicalIF":0.0,"publicationDate":"2023-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139034232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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