Perturbed Pin Map Design for Low Differential Crosstalk in 112 Gb/s PAM4 Applications

As the wired communication data rate increases up to 112 Gb/s and even higher, the differential crosstalk from neighboring pairs becomes much more serious and could significantly deteriorate signal integrity. In this article, a perturbed pin map design method is proposed to reduce the differential crosstalk for 112 Gb/s four-level pulse amplitude modulation applications. Three physical parameters, the distance of two signal pins in a pair, the angle of two adjacent signal pairs, and the positions of surrounding ground vias, are perturbed for maximum crosstalk reduction. Without changing the signal-to-ground ratio and area per differential pair, the proposed pin map patterns can significantly mitigate the total differential crosstalk in via connection field, by both common-mode cancelation enhancement of signal vias and shielding effect improvement of ground vias through perturbation. Numerical examples are performed to verify the validity of crosstalk reduction in both square and triangular pin arrays. Finally, the effect of perturbation amplitude on crosstalk reduction is analyzed; it is shown that differential crosstalk decreases fast when the perturbed offset is smaller than 2 r ( r is the radius of balls), and it becomes slow when the perturbed offset is larger than 2r . Compared with the nonperturbed square and triangular patterns, the integrated crosstalk noises of the perturbed patterns are reduced by 70.62% and 68.72%, respectively, at 112 Gb/s, and the insertion loss to crosstalk ratios are averagely increased by 11 dB and 8 dB, respectively, up to 40 GHz, with a perturbed offset of 2 r .