IEEE Transactions on Signal and Power Integrity最新文献

IEEE Electromagnetic Compatibility Society Information

IEEE Transactions on Signal and Power Integrity Pub Date : 2025-01-27 DOI: 10.1109/TSIPI.2025.3533060

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2024 Index IEEE Transactions on Signal and Power Integrity Vol. 3

IEEE Transactions on Signal and Power Integrity Pub Date : 2025-01-27 DOI: 10.1109/TSIPI.2025.3534910

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System-Level Application of the Z-Directed Component (ZDC) for Power Integrity

IEEE Transactions on Signal and Power Integrity Pub Date : 2025-01-08 DOI: 10.1109/TSIPI.2025.3527436

Pranay Vuppunutala;Xiaolu Zhu;Junyong Park;Keith B. Hardin;Zachary C. N. Kratzer;John T. Fessler;Biyao Zhao;Siqi Bai

{"title":"System-Level Application of the Z-Directed Component (ZDC) for Power Integrity","authors":"Pranay Vuppunutala;Xiaolu Zhu;Junyong Park;Keith B. Hardin;Zachary C. N. Kratzer;John T. Fessler;Biyao Zhao;Siqi Bai","doi":"10.1109/TSIPI.2025.3527436","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3527436","url":null,"abstract":"The design of the power distribution network (PDN) involves the careful placement of several decoupling capacitors around the integrated circuits (ICs) to mitigate the noise inherent with switching. A new technology capacitor, <italic>Z</i>-directed component (ZDC), can target printed circuit board (PCB) component locations at the package balls of the IC through the PCB. A commercially available PCB PDN design, using a conventional surface mount technology (SMT) decoupling solution, was analyzed utilizing a commercially available simulation-based tool and validated by impedance measurements. The ZDC PDN performance in the system was predicted by substituting a ZDC capacitor model for selected SMT capacitors. The validation was carried out using two-port PDN measurements on the PCB. Finally, an equivalent circuit model is developed using cavity model and plane-pair partial element equivalent circuit techniques to represent the physics associated with current paths from all the decoupling capacitors to the IC. The simulation results from a commercial tool are corroborated with both the measurements and an equivalent circuit model. It is demonstrated that opting for ZDC as a decoupling solution can deliver significantly lower impedances as compared to the SMT solution for this design. Thus, the ZDC approach is a promising decoupling solution for future power integrity applications, enhancing the power integrity performance of the system, facilitating the use of cost-effective lower layer count PCBs for much higher speeds than adopting an SMT strategy.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"10-18"},"PeriodicalIF":0.0,"publicationDate":"2025-01-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143106788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Multilayer Ceramic Capacitor Source Model Application in Acoustic Noise Prediction

IEEE Transactions on Signal and Power Integrity Pub Date : 2025-01-08 DOI: 10.1109/TSIPI.2025.3527437

Yifan Ding;Jianmin Zhang;Ming-Feng Xue;Xin Hua;Benjamin Leung;Eric A. MacIntosh;Chulsoon Hwang

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Analytic Method of Fast Eye-Diagram Index for Multiple Coupled Lines in DDR DDR中多耦合线快速眼图索引的解析方法

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-12-23 DOI: 10.1109/TSIPI.2024.3507712

Kai Li;Chiu-Chih Chou;Wei-Da Kuo;Hao-Hsiang Chuang;Hsin-Chan Hsieh;Ruey-Beei Wu

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Planar Balanced Full-Passband Linear-Phase Dual-Port Absorptive Filter Based on Negative Group Delay Equalized Compensation 基于负群延迟均衡补偿的平面平衡全通带线性相位双端口吸收滤波器

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-12-04 DOI: 10.1109/TSIPI.2024.3511497

Shipeng Zhao;Zhongbao Wang;Hongmei Liu;Shaojun Fang

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High Signal Integrity Interconnects Embedded With Metasurface for Far-End Crosstalk Reduction and High-Speed Data Transfer 用于远端串扰减少和高速数据传输的嵌入超表面的高信号完整性互连

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-12-02 DOI: 10.1109/TSIPI.2024.3509800

Yingcong Zhang;Guoan Wang

{"title":"High Signal Integrity Interconnects Embedded With Metasurface for Far-End Crosstalk Reduction and High-Speed Data Transfer","authors":"Yingcong Zhang;Guoan Wang","doi":"10.1109/TSIPI.2024.3509800","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3509800","url":null,"abstract":"This article proposes a novel structure of coupled line with embedded metasurface aimed at mitigating far-end crosstalk (FEXT) in high-speed data transmission. The square loop metasurface structure is implemented under the coupled line to increase the mutual capacitance between signal traces, thereby mitigating FEXT in the coupled line. The capacitance and the inductance matrices of both conventional coupled line and the proposed metasurface-embedded structure are extracted with numerical equations from the simulations and applied to the equivalent circuit model to comprehensively analyze and accurately evaluate the proposed structure. To validate the design efficacy of the proposed concept, prototypes of conventional and the proposed coupled line structure are implemented on a FR-4 printed circuit board, and their performance in both frequency domain and time domain are measured and compared. Compared to conventional coupled line, experimental results demonstrate that the proposed metasurface embedded coupled line structure significantly enhances the FEXT performance while ensuring robust high-speed signal propagation along the signal traces. Specifically, FEXT is reduced by 8.2 dB within the frequency range of 1–12 GHz, and with the largest improvement of 42.84 dB at 10.9 GHz. This superior FEXT performance coupled with ultra-low latency underscores the significant potential of the proposed metasurface embedded coupled line structure for application in miniaturized high-speed systems.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"212-218"},"PeriodicalIF":0.0,"publicationDate":"2024-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142825835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Modeling of Through-Silicon Capacitor and Its Applications for the Optimization of Power Distribution Network in 3-D Integrated Circuits 硅通电容器建模及其在三维集成电路配电网络优化中的应用

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-11-28 DOI: 10.1109/TSIPI.2024.3505141

Xiao-Pei Zhou;Da-Wei Wang;Wen-Sheng Zhao;Peng Zhang;Jia-Hao Pan

{"title":"Modeling of Through-Silicon Capacitor and Its Applications for the Optimization of Power Distribution Network in 3-D Integrated Circuits","authors":"Xiao-Pei Zhou;Da-Wei Wang;Wen-Sheng Zhao;Peng Zhang;Jia-Hao Pan","doi":"10.1109/TSIPI.2024.3505141","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3505141","url":null,"abstract":"In this article, the application of through-silicon capacitor (TSC) in the power distribution network (PDN) of three-dimensional (3-D) integrated circuits (ICs) is systematically investigated for the first time. Additionally, the deep reinforcement learning (DRL) algorithm is integrated to minimize the deployment of TSCs while achieving the target impedance, thereby reducing the cost in practical applications. By selectively replacing the specified through-silicon vias (TSV) with TSCs in the existing TSV array, this method not only ensures uniform stress distribution within the structure but also effectively reduces the required area for decoupling capacitors and enables greater flexibility in TSC applications. A comprehensive investigation is carried out to assess the electrical characteristics of TSCs and their efficiency in mitigating PDN impedance. Then, an advanced approach, combining vector fitting and neural networks, is employed for the parametric modeling of TSCs. The impedance of PDN in 3-D IC is computed using transmission matrix method. By incorporating 3-D IC PDN and TSC information as inputs, the DRL algorithm determines the optimal placement and types of TSCs. The impedance suppression effect of TSC in 3-D IC PDN is verified through various test cases, and the optimization results of DRL were compared with those of other intelligent algorithms. Finally, a comparative analysis was carried out, highlighting the significance of this article.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"199-211"},"PeriodicalIF":0.0,"publicationDate":"2024-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142797929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Non-TEM Dispersion in Microstrip Structures at High Data Rates 高数据速率下微带结构中的非 TEM 扩散

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-11-07 DOI: 10.1109/TSIPI.2024.3493817

Aditya Rao;Eric Bogatin;Melinda Piket-May;Mohammed F. Hadi

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Augmented Genetic Algorithm for Decoupling Capacitor Optimization in Power Distribution Network Design Through Improved Population Generation 通过改进种群生成实现配电网络设计中去耦电容器优化的增强遗传算法

IEEE Transactions on Signal and Power Integrity Pub Date : 2024-11-04 DOI: 10.1109/TSIPI.2024.3490512

Jack Juang;Ling Zhang;Haran Manoharan;Francesco De Paulis;Chulsoon Hwang

{"title":"Augmented Genetic Algorithm for Decoupling Capacitor Optimization in Power Distribution Network Design Through Improved Population Generation","authors":"Jack Juang;Ling Zhang;Haran Manoharan;Francesco De Paulis;Chulsoon Hwang","doi":"10.1109/TSIPI.2024.3490512","DOIUrl":"https://doi.org/10.1109/TSIPI.2024.3490512","url":null,"abstract":"In power distribution network designs, a large number of decoupling capacitors (decaps) may be needed to satisfy target impedance limits. Many algorithms have been proposed and implemented for finding the optimal decap placement, including genetic algorithms (GA), and machine learning methods. In this work, an improved GA is proposed for finding the decap placement pattern that can satisfy a target impedance using the minimum number of decaps. The distribution of capacitors expected to appear in the global minimum solution is first predicted by determining how effective each decap type is toward satisfying certain critical impedance points. This estimation is used to inform the generation of initial solutions in order to put the initial search space nearer the global minimum and ensure certain solution characteristics appear. GA search using this improved population generation is found to be an improvement over a Canonical GA implementation, by finding solutions where the latter could not, or finding a solution using fewer decaps.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"3 ","pages":"186-198"},"PeriodicalIF":0.0,"publicationDate":"2024-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142736361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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