IEEE Transactions on Signal and Power Integrity最新文献

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Balanced Dispersive Delay Circuit With Common-Mode Suppression and Filtering Characteristics 具有共模抑制和滤波特性的平衡色散延迟电路
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-10-14 DOI: 10.1109/TSIPI.2025.3621185
Shipeng Zhao;Zhongbao Wang;Dehao Zhao;Hongmei Liu;Shaojun Fang
{"title":"Balanced Dispersive Delay Circuit With Common-Mode Suppression and Filtering Characteristics","authors":"Shipeng Zhao;Zhongbao Wang;Dehao Zhao;Hongmei Liu;Shaojun Fang","doi":"10.1109/TSIPI.2025.3621185","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3621185","url":null,"abstract":"A novel balanced dispersive delay circuit (DDC) with common-mode (CM) suppression and bandpass filtering characteristics is proposed for signal integrity, analog signal processing, and group delay equalization. The utilization of parallel coupled lines not only achieves a bandpass filtering response for differential-mode signals but also suppresses the transmission of common-mode noise as well as port matching characteristics. The in-band large linear group delay shape is generated by configuring phase-asymmetric transmission paths at both ends of the stub-loaded microstrip lines. The introduction of lumped resistors can be used to adjust the linearity of the in-band group delay. To further validate the workability of the design, a microstrip prototype of the balanced filtering DDC with a simple circuit structure is fabricated and measured. Compared to the reported DDCs, the proposed one not only has in-band linear group delay and bandpass filtering responses but also extends the DDC to the balanced topology to realize an excellent CM suppression characteristic for the first time.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"191-196"},"PeriodicalIF":0.0,"publicationDate":"2025-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145352224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
De-Embedding for Coupled Three-Port Devices 耦合三端口器件的去嵌入
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-09-10 DOI: 10.1109/TSIPI.2025.3608692
Junyong Park;Yuandong Guo;Bo Pu;DongHyun Kim;Jun Fan
{"title":"De-Embedding for Coupled Three-Port Devices","authors":"Junyong Park;Yuandong Guo;Bo Pu;DongHyun Kim;Jun Fan","doi":"10.1109/TSIPI.2025.3608692","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3608692","url":null,"abstract":"De-embedding techniques have been introduced to evaluate the real electrical performances of a device under test (DUT), e.g., the traditional thru-reflect-line and short-open-load-thru standards, where the transfer matrix (T-matrix) and its inverse form are adopted in the mathematical process. A DUT may have three coupled ports in the fields of radio frequency and electromagnetic compatibility. The symmetry in the corresponding S-matrix breaks down, because the numbers of incident and reflected ports are not equal. Thus, it leads to a nonsquare T-matrix by definition. Given that the inverse expression of a nonsquare matrix does not exist, the conventional de-embedding methods are inapplicable for a coupled three-port network. In this article, a de-embedding algorithm, which is feasible for coupled three-port devices, is proposed and verified through the measurement. The proposed de-embedding technique may also be applied on devices with more than three ports.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"185-190"},"PeriodicalIF":0.0,"publicationDate":"2025-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145352190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Novel Observations on Impact of Ground Bounce on Logic-HIGH 地面弹跳对Logic-HIGH影响的新观测
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-08-07 DOI: 10.1109/TSIPI.2025.3596886
Anuj Kumar;Jai Narayan Tripathi
{"title":"Novel Observations on Impact of Ground Bounce on Logic-HIGH","authors":"Anuj Kumar;Jai Narayan Tripathi","doi":"10.1109/TSIPI.2025.3596886","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3596886","url":null,"abstract":"This article presents novel observations on the impact of ground-bounce noise (GBN) on logic-HIGH in high-speed digital design. While the impact of power supply noise on logic-HIGH is undeniable and comprehensively studied in the literature, the impact of ground bounce is perceived, as well as the analysis is majorly focused on logic-LOW. This work demonstrates and analyses the impact of GBN on logic-HIGH. The observations are supported by a theoretical investigation using both the analytical and small-signal approaches. Several examples are presented to validate the novel observations considering both the simulation and measurement-based case studies. The simulation-based case studies are presented using several complementary metal oxide semiconductor technologies and measurement-based case studies are performed using standard inverter integrated circuits. There is a close correlation observed between the practical observations and the corresponding theoretical developments.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"176-184"},"PeriodicalIF":0.0,"publicationDate":"2025-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144896775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extraction of DKglass and DKresin for PCB Striplines and Analysis of Far-End Crosstalk PCB带状线中dk玻璃和dk树脂的提取及远端串扰分析
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-06-26 DOI: 10.1109/TSIPI.2025.3583657
Junyong Park;Yuandong Guo;Xiaoning Ye;DongHyun Kim
{"title":"Extraction of DKglass and DKresin for PCB Striplines and Analysis of Far-End Crosstalk","authors":"Junyong Park;Yuandong Guo;Xiaoning Ye;DongHyun Kim","doi":"10.1109/TSIPI.2025.3583657","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3583657","url":null,"abstract":"Far-end crosstalk (FEXT) in typical high-speed printed circuit board striplines is primarily attributed to dielectric inhomogeneity. In this article, the inhomogeneity problem is comprehensively addressed by a novel algorithm that characterizes the dielectric constants (DKs) of glass fibers and epoxy resin. In contrast to other methods, the proposed approach enables one to assess the impact of geometrical parameters on stripline FEXT and to estimate DK<sub>core</sub> and DK<sub>prepreg</sub> based on DK<sub>glass</sub> and DK<sub>resin</sub> values extracted through analytical expressions. Full-wave simulations and real-board measurements are conducted to verify the proposed approach.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"149-155"},"PeriodicalIF":0.0,"publicationDate":"2025-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144572971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Hybrid Boundary Element and Analytical Method (BEAM) for Efficient Capacitance Extraction in Multilayer Dielectrics 多层介质中高效电容提取的混合边界元与解析法(BEAM)
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-06-17 DOI: 10.1109/TSIPI.2025.3580490
Jie Li;Min Tang;Junfa Mao
{"title":"A Hybrid Boundary Element and Analytical Method (BEAM) for Efficient Capacitance Extraction in Multilayer Dielectrics","authors":"Jie Li;Min Tang;Junfa Mao","doi":"10.1109/TSIPI.2025.3580490","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3580490","url":null,"abstract":"In this article, a hybrid approach combining the boundary element method (BEM) with analytical solution of stacked dielectrics is proposed for the capacitance extraction of multilayer dielectric structures. First, the flexible BEM employs an adaptive refined mesh to address the interconnect region, which contains complex conductors and conformal dielectrics. Second, for the upper and lower stacked dielectrics, the analytical solution based on separation of variables technique is derived to construct interface equations. After that, these equations are treated as the numerical boundary conditions and incorporated into the matrix equation formed by the BEM in the interconnect region. By this means, the proposed hybrid boundary element and analytical method efficiently compresses the regular stacked dielectrics into interface equations through analytical expressions, ensuring high accuracy without introducing additional errors. Furthermore, the numerical discretization is confined to the interconnect region, greatly reducing the number of unknowns and resulting in significant savings in computational resources. Numerical examples validate the accuracy and efficiency of the proposed method.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"141-148"},"PeriodicalIF":0.0,"publicationDate":"2025-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Efficient Fixture Removal Embedded Modeling Method Based on TDR and CNN Technique 基于TDR和CNN技术的高效夹具移除嵌入式建模方法
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-04-15 DOI: 10.1109/TSIPI.2025.3560949
Si-Yao Tang;Xing-Chang Wei;Richard Xian-Ke Gao
{"title":"An Efficient Fixture Removal Embedded Modeling Method Based on TDR and CNN Technique","authors":"Si-Yao Tang;Xing-Chang Wei;Richard Xian-Ke Gao","doi":"10.1109/TSIPI.2025.3560949","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3560949","url":null,"abstract":"<italic>S</i>-parameters are typically employed in equivalent circuit (EC) modeling of electronic devices. However, for existing modeling procedures, the impact of fixtures on <italic>S</i>-parameter measurement cannot be neglected and needs to be eliminated through de-embedding before modeling. This letter proposes a new approach that integrates fixture removal into the modeling procedure by combining time-domain reflection and convolutional neural network techniques. The proposed approach bypasses the need for separate de-embedding, allowing for direct derivation of the EC model. Different to the traditional modeling procedure, its advantages in simplifying the modeling procedure and avoiding the errors introduced by de-embedding have been validated by the physical measurement.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"132-135"},"PeriodicalIF":0.0,"publicationDate":"2025-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reinforcement-Learning-Based Optimization of Bonding Wires for EMI Mitigation 基于强化学习的抗电磁干扰键合线优化
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-04-11 DOI: 10.1109/TSIPI.2025.3560229
Wenchang Huang;Muqi Ouyang;Yin Sun;Jongjoo Lee;Chulsoon Hwang
{"title":"Reinforcement-Learning-Based Optimization of Bonding Wires for EMI Mitigation","authors":"Wenchang Huang;Muqi Ouyang;Yin Sun;Jongjoo Lee;Chulsoon Hwang","doi":"10.1109/TSIPI.2025.3560229","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3560229","url":null,"abstract":"Wire bonding as a metallic interconnection is widely used to transmit high-speed signals and supply power within the integrated circuit (IC) packages. However, bonding wires also effectively radiate power noise and the harmonics of the output signals, causing electromagnetic interference and radio frequency interference issues. In this study, a current-loop model using a transfer admittance matrix for estimating the equivalent radiation sources of an IC/package featuring bonding wires is proposed. Based on the proposed modeling method, a novel reinforcement learning algorithm is applied to optimize the configurations of signal, power, and ground bonding wires, mitigating the radiation from the IC/package. The proposed modeling method is validated experimentally by a self-designed IC with an inverter-type buffer based on a complementary metal–oxide–semiconductor 0.18-μm process, and a radio frequency victim antenna built on the same printed circuit board. From 720 to 900 MHz, the maximum difference between the proposed modeling method and the measurement results is only 2.3 dB. In addition, full-wave simulation is performed to evaluate the optimization results of the reinforcement learning algorithm, showing radiation mitigation of over 7 dB compared to the randomly selected bonding-wire configurations.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"124-131"},"PeriodicalIF":0.0,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143883336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mode-Dependent Effective Dielectric Constants of Inhomogeneous Dielectric Layers for PCB Applications PCB应用中非均匀介质层的模式相关有效介电常数
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-04-08 DOI: 10.1109/TSIPI.2025.3558202
Chaofeng Li;Mehdi Mousavi;Seyed Mostafa Mousavi;Reza Asadi;Xiaoning Ye;DongHyun Kim
{"title":"Mode-Dependent Effective Dielectric Constants of Inhomogeneous Dielectric Layers for PCB Applications","authors":"Chaofeng Li;Mehdi Mousavi;Seyed Mostafa Mousavi;Reza Asadi;Xiaoning Ye;DongHyun Kim","doi":"10.1109/TSIPI.2025.3558202","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3558202","url":null,"abstract":"The dielectric substrate of printed circuit boards (PCBs) generally consists of epoxy or polyurethane resin and fiberglass, which can be modeled as inhomogeneous dielectric layers (IDLs). IDLs are not homogeneous in the perpendicular direction of the layers’ interface, which means that they constitute an anisotropic material. Thus, the effective dielectric constant (Dk) for IDLs is direction dependent, i.e., mode dependent. In this study, the effective Dk values of IDLs are extracted for different modes using three commonly used full-wave simulation models: the transverse electric (TE), transverse magnetic (TM), and equivalent parallel-plate capacitor models. The results for the TE and TM modes showed a 10% discrepancy. The effective Dk of IDLs was efficiently estimated by the parallel-plate capacitor model based on the layers’ dielectric properties and thicknesses. Moreover, the analytical formulas of resonance frequency for a cylindrical cavity resonator filled with IDLs were derived to extract the effective Dk of the IDLs at different resonance modes, which could be used as a guideline of resonator methods for PCB material characterization. These results correlated with the results from the equivalent parallel capacitor model. Finally, the impact of IDL anisotropy on transmission line loss and time-domain reflectometry impedance was analyzed based on full-wave simulation.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"116-123"},"PeriodicalIF":0.0,"publicationDate":"2025-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143875274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Generalized Mixed-Mode S-Parameter Framework for Accurate Multipair Crosstalk Analysis in High-Speed Digital Channels 高速数字信道中精确多对串扰分析的广义混模s参数框架
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-04-03 DOI: 10.1109/TSIPI.2025.3557786
Manish K. Mathew;Xiao-Ding Cai;Chaofeng Li;Mehdi Mousavi;Reza Asadi;Junyong Park;Shameem Ahmed;Bidyut Sen;DongHyun Kim
{"title":"Generalized Mixed-Mode S-Parameter Framework for Accurate Multipair Crosstalk Analysis in High-Speed Digital Channels","authors":"Manish K. Mathew;Xiao-Ding Cai;Chaofeng Li;Mehdi Mousavi;Reza Asadi;Junyong Park;Shameem Ahmed;Bidyut Sen;DongHyun Kim","doi":"10.1109/TSIPI.2025.3557786","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3557786","url":null,"abstract":"The accuracy of mixed-mode S-parameter conversion is important for crosstalk mitigation in high-speed digital systems. However, the conventional mixed-mode S-parameter formulation assumes equal even-mode and odd-mode impedances<inline-formula><tex-math>$ ( { {{{{Z}}}_{{{oo}}}} = {{{{Z}}}_{{{oe}}}} } )$</tex-math></inline-formula>, which limits its applicability, particularly in tightly coupled differential structures. In this article, we propose a novel mixed-mode S-parameter generalization (generalized M1/M2 approach) using an N-differential port network, which allows for multipair (i.e., pair-to-pair) crosstalk analysis on coupled differential systems, given by:<inline-formula><tex-math>$ {{[ {{{{{S}}}_{{{mm}}}}} ]}_{{{i}} times {{i}}}} = ({{[ {{{{{M}}}_1}} ]}_{{{i}} times {{i}}}} times {{[ {{{{{S}}}_{{s}}}} ]}_{{{i}} times {{i}}}} + {{[ {{{{{M}}}_2}} ]}_{{{i}} times {{i}}}}) times {{( {{{{[ {{{{{M}}}_1}} ]}}_{{{i}} times {{i}}}} + {{{[ {{{{{M}}}_2}} ]}}_{{{i}} times {{i}}}} times [ {{{{{S}}}_{{s}}}} ]} )}^{ - 1}}$</tex-math></inline-formula>. The proposed M1/M2 formulation eliminates the need for renormalization by integrating mode-dependent coupling factors <inline-formula><tex-math>${{{{k}}}_{{{oo}}}} {and} {{{{k}}}_{{{oe}}}},$</tex-math></inline-formula> ensuring a more physically meaningful representation of mixed-mode S-parameters, thereby improving the accuracy of both intrapair and interpair crosstalk analysis in high-speed digital systems. The effectiveness of the proposed M1/M2 approach is demonstrated through intrapair and interpair analysis on tightly coupled striplines, revealing peak-to-peak variations in differential return loss, interpair near-end crosstalk, and far-end crosstalk. Validation using a differential setup with commercial tools (Balun approach) confirmed the formulation's accuracy, with errors below 1%. In addition, measurement validation on a microstrip differential pair highlighted the model's scalability and precision, emphasizing the importance of incorporating mode-dependent impedance variations.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"96-108"},"PeriodicalIF":0.0,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143856146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimizing Equalizations of FFE, CTLE, and DFE Jointly Through a Single Pulse Response 通过单一脉冲响应优化FFE, CTLE和DFE的联合均衡
IEEE Transactions on Signal and Power Integrity Pub Date : 2025-04-02 DOI: 10.1109/TSIPI.2025.3557370
Yen-Hao Chen;Chun-I Tseng;Ding-Bing Lin
{"title":"Optimizing Equalizations of FFE, CTLE, and DFE Jointly Through a Single Pulse Response","authors":"Yen-Hao Chen;Chun-I Tseng;Ding-Bing Lin","doi":"10.1109/TSIPI.2025.3557370","DOIUrl":"https://doi.org/10.1109/TSIPI.2025.3557370","url":null,"abstract":"With the increasing data rate of high-speed digital systems, equalization techniques have been widely applied to counteract intersymbol interference and maximize eye opening in today's high-speed serial links. Channel simulations with optimal equalization settings allow engineers to explore design tradeoffs, reduce the need for costly prototypes, and ensure robust performance before manufacturing. Existing equalization optimization methods require either iterative interaction with commercial channel simulators during the optimization process, developing models with extensive training data before optimization, or separately optimizing linear equalizers in the frequency domain. In this article, the method to jointly optimize feedforward equalization, continuous-time linear equalization, and decision feedback equalization at the transmitter, receiver, or both is proposed. The optimization is achieved through the analysis of a nonequalized pulse response, eliminating the computational cost of channel simulations during optimization. Practical examples using non-return-to-zero (NRZ) and pulse amplitude modulation four-level (PAM4) signaling schemes demonstrate the effectiveness of the proposed method. A comparison with the Bayesian optimization approach, a widely discussed method for equalization optimization, shows that while both methods achieve nearly identical optimal eye openings, the proposed method offers significantly higher optimization efficiency.","PeriodicalId":100646,"journal":{"name":"IEEE Transactions on Signal and Power Integrity","volume":"4 ","pages":"88-95"},"PeriodicalIF":0.0,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143840091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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