Novel Observations on Impact of Ground Bounce on Logic-HIGH

Abstract

This article presents novel observations on the impact of ground-bounce noise (GBN) on logic-HIGH in high-speed digital design. While the impact of power supply noise on logic-HIGH is undeniable and comprehensively studied in the literature, the impact of ground bounce is perceived, as well as the analysis is majorly focused on logic-LOW. This work demonstrates and analyses the impact of GBN on logic-HIGH. The observations are supported by a theoretical investigation using both the analytical and small-signal approaches. Several examples are presented to validate the novel observations considering both the simulation and measurement-based case studies. The simulation-based case studies are presented using several complementary metal oxide semiconductor technologies and measurement-based case studies are performed using standard inverter integrated circuits. There is a close correlation observed between the practical observations and the corresponding theoretical developments.