Balanced Dispersive Delay Circuit With Common-Mode Suppression and Filtering Characteristics

Shipeng Zhao;Zhongbao Wang;Dehao Zhao;Hongmei Liu;Shaojun Fang
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Abstract

A novel balanced dispersive delay circuit (DDC) with common-mode (CM) suppression and bandpass filtering characteristics is proposed for signal integrity, analog signal processing, and group delay equalization. The utilization of parallel coupled lines not only achieves a bandpass filtering response for differential-mode signals but also suppresses the transmission of common-mode noise as well as port matching characteristics. The in-band large linear group delay shape is generated by configuring phase-asymmetric transmission paths at both ends of the stub-loaded microstrip lines. The introduction of lumped resistors can be used to adjust the linearity of the in-band group delay. To further validate the workability of the design, a microstrip prototype of the balanced filtering DDC with a simple circuit structure is fabricated and measured. Compared to the reported DDCs, the proposed one not only has in-band linear group delay and bandpass filtering responses but also extends the DDC to the balanced topology to realize an excellent CM suppression characteristic for the first time.
具有共模抑制和滤波特性的平衡色散延迟电路
提出了一种具有共模抑制和带通滤波特性的新型平衡色散延迟电路(DDC),用于信号完整性、模拟信号处理和群延迟均衡。利用并行耦合线不仅实现了差模信号的带通滤波响应,而且抑制了共模噪声的传输以及端口匹配特性。通过在存根负载微带线两端配置相位不对称传输路径,产生带内大线性群延迟形状。引入集总电阻可用于调整带内群延迟的线性度。为了进一步验证该设计的可行性,制作了一个具有简单电路结构的平衡滤波DDC微带样机并进行了测量。与已有的DDC相比,该DDC不仅具有带内线性群延迟和带通滤波响应,而且将DDC扩展到平衡拓扑,首次实现了良好的CM抑制特性。
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