IEEE open journal of circuits and systems最新文献

{"title":"A Sub-mW Cortex-M4 Microcontroller Design for IoT Software-Defined Radios","authors":"Mathieu Xhonneux;Jérôme Louveaux;David Bol","doi":"10.1109/OJCAS.2023.3270752","DOIUrl":"https://doi.org/10.1109/OJCAS.2023.3270752","url":null,"abstract":"We present an Internet-of-Things (IoT) software-defined radio platform based on an ultra low-power microcontroller. Whereas conventional wireless IoT radios often implement a single protocol, we demonstrate that general-purpose microcontrollers running software implementations of wireless physical layers are a promising solution to increase interoperability of IoT devices. Yet, since IoT devices are often energy-constrained, the underlying challenge is to implement the digital signal processing of the radio in software while maintaining an overall very low power consumption. To overcome this problem, we propose an ultra low-power microcontroller architecture with an ARM Cortex-M4 processor for the protocol-specific computations and a hardware digital front-end for the generic signal processing. The proposed architecture has been prototyped in 28nm FDSOI and the physical layers of the well-known LoRa and Sigfox protocols have been implemented in software. Thanks to the efficient hardware/software partitioning and an ultra-low power digital implementation, experimental evaluations of the microcontroller prototype show sub-mW power consumptions (32 – $332~mu text{W}$ ) for the digital signal processing of the software-defined radios.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"4 ","pages":"165-175"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/10019301/10109258.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49909923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High Efficiency Power Management Unit for Implantable Optical-Electrical Stimulators","authors":"Noora Almarri;Dai Jiang;Peter J. Langlois;Mohamad Rahal;Andreas Demosthenous","doi":"10.1109/OJCAS.2023.3240644","DOIUrl":"https://doi.org/10.1109/OJCAS.2023.3240644","url":null,"abstract":"Battery-less active implantable devices are of interest because they offer longer life span and eliminate costly battery replacement surgical interventions. This is possible as a result of advances in inductive power transfer and development of power management circuits to maximize the overall power transfer and provide various voltage levels for multi-functional implantable devices. Rehabilitation therapy using optical stimulation of genetically modified peripheral neurons requires high current loads. Standard rectification topologies are inefficient and have associated voltage drops unsuited for miniaturized implants. This paper presents an integrated power management unit (PMU) for an optical-electrical stimulator to be used in the treatment of motor neurone disease. It includes a power-efficient regulating rectifier with a novel body biased high-speed comparator providing 3.3 V for the operation of the stimulator, a 3-stage latch-up charge pump with 12 V output for the input stage of the optical-electrical stimulator, and 1.8 V for digital control logic. The chip was fabricated in a $0.18 ~mu text{m}$ CMOS process. Measured results show that for a regulated output of 3.3 V delivering 30.3 mW power, the peak power conversion efficiency is 84.2% at 6.78 MHz inductive link tunable frequency reducing to 70.3% at 13.56 MHz. The charge pump with on chip capacitors has 90.9% measured voltage conversion efficiency.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"4 ","pages":"3-14"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/10019301/10029935.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49910009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Grant-Free Sparse Code Multiple Access for Uplink Massive Machine-Type Communications and Its Real-Time Receiver Design","authors":"Ti-Yu Chen;Zhi-Jing Lin;Tzi-Dar Chiueh","doi":"10.1109/OJCAS.2023.3299052","DOIUrl":"https://doi.org/10.1109/OJCAS.2023.3299052","url":null,"abstract":"Massive Machine-type Communications (mMTCs) is a major use case for the 5G standard. The grant-free (GF) sparse-coded multiple access (SCMA) transmission is particularly spectrum efficient in the sporadic uplink traffic, which is characteristic of the mMTC networks. In this paper, an uplink GF-SCMA receiver with a user activity detection (UAD) function was designed and implemented. In particular, several new techniques were proposed to enhance the SCMA decoder performance; they include delayed serial update, early stopping, message passing algorithm equation reformulation, distance approximation, and sum circuit sharing. To meet the real-time operation requirements, we implemented key inner receiver function circuits, such as carrier frequency synchronization, user signature detection, channel estimation and compensation, soft SCMA detection, etc. on a Xilinx KCU1500 FPGA chip. Finally, an over-the-air (OTA) prototype has been constructed, demonstrating the efficient and reliable multi-user GF-SCMA uplink transmission of the proposed system.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"4 ","pages":"218-227"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/10019301/10195181.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49919368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Introduction to the Special Section on Smart Imaging","authors":"Ping-Hsuan Hsieh;Vanessa Chen","doi":"10.1109/OJCAS.2022.3219531","DOIUrl":"https://doi.org/10.1109/OJCAS.2022.3219531","url":null,"abstract":"This Special Section of the IEEE Open Journal of Circuits and Systems is dedicated to a collection of articles on Smart Imaging, to promote techniques in both system and circuit levels to tackle various challenges as the requirements for image quality, efficiency, and levels of integration keep increasing and to provide insightful guidelines for intelligent vision in the years to come. This Special Section covers articles for applications including vision system, time-of-flight system, and terahertz imaging system.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"309-310"},"PeriodicalIF":0.0,"publicationDate":"2022-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/9684754/09963772.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49909765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Editorial IEEE Open Journal of Circuits and Systems: Special Section on Advanced Power Electronics Techniques for Smart Grid Applications","authors":"Mengqi Wang;Xiu Yao","doi":"10.1109/OJCAS.2022.3218914","DOIUrl":"https://doi.org/10.1109/OJCAS.2022.3218914","url":null,"abstract":"The Advent of modern power electronics has brought tremendous impact on emerging power systems. In an emerging smart grid, as the number of inverter- and converter-based devices increases to more than hundreds of thousands, it is rather intuitive that the state-of-the-art technical solutions and industry practices will no longer be sustainable. The combination of power electronics and advanced control technologies serve as the key enabler of a wide range of smart grid applications. While tremendous progress has been made in advancing the standalone power electronics technologies, much less attention has been paid to bridging the gap between traditionally disjoint research areas – power electronics, power systems, and intelligent control – ultimately facilitating the vision of 100% carbonneutral energy systems come to fruition. There is a growing interest in the concepts of power electronics-enabled power systems around the world. This special section includes two high-quality papers, which cover the trending topic on the control strategy for inverters that are essential for Smart Grid applications.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"286-287"},"PeriodicalIF":0.0,"publicationDate":"2022-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/9684754/09961069.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49909762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Understanding Canadians' knowledge, attitudes and practices related to antimicrobial resistance and antibiotic use: Results from public opinion research.","authors":"Anna-Louise Crago, Stéphanie Alexandre, Kahina Abdesselam, Denise Gravel Tropper, Michael Hartmann, Glenys Smith, Tanya Lary","doi":"10.14745/ccdr.v48i1112a08","DOIUrl":"10.14745/ccdr.v48i1112a08","url":null,"abstract":"<p><strong>Background: </strong>Antimicrobial resistance is a current and pressing issue in Canada. Population-level antibiotic consumption is a key driver. The Public Health Agency of Canada undertook a comprehensive assessment of the Canadian public's knowledge, attitudes and practices in relation to antimicrobial resistance and antibiotic use, to help inform the implementation of public awareness and knowledge mobilization.</p><p><strong>Methods: </strong>Data were collected in three phases: 1) six in-person focus groups (53 participants) to help frame the survey; 2) nationwide survey administration to 1,515 Canadians 18 years and older via cell phone and landline; and 3) 12 online focus groups to analyze survey responses. Survey data is descriptive.</p><p><strong>Results: </strong>A third (33.9%) of survey respondents reported using antibiotics at least once in the previous 12 months, 15.8% more than twice and 4.6% more than five times. Antibiotic use was reported more among 1) those with a household income below $60,000, 2) those with a medical condition, 3) those without a university education and 4) among the youngest adults (18-24 years of age) and (25-34 years of age). Misinformation about antibiotics was common: 32.5% said antibiotics \"can kill viruses\"; 27.9% said they are \"effective against colds and flu\"; and 45.8% said they are \"effective in treating fungal infections\". Inaccurate information was reported more often by those 1) aged 18-24 years, 2) with a high school degree or less and 3) with a household income below $60,000. In focus groups, the time/money trade-offs involved in accessing medical care were reported to contribute to pushing for a prescription or using unprescribed antibiotics, particularly in more remote contexts, while the cost of a prescription contributed to sharing and using old antibiotics. A large majority, across all demographic groups, followed the advice of medical professionals in making health decisions.</p><p><strong>Conclusion: </strong>High trust in medical professionals presents an important opportunity for knowledge mobilization. Delayed prescriptions may alleviate concerns about the time/money constraints of accessing future care. Consideration should be given to prioritizing access to appropriate diagnostic and other technology for northern and/or remote communities and/or medical settings serving many young children to alleviate concerns of needing a prescription or of needing to return later.</p>","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"1 1","pages":"550-558"},"PeriodicalIF":0.0,"publicationDate":"2022-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10779429/pdf/","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84881415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Wang Algebra: From Theory to Practice","authors":"Bob Ross;Cong Ling","doi":"10.1109/OJCAS.2022.3217065","DOIUrl":"10.1109/OJCAS.2022.3217065","url":null,"abstract":"Wang algebra was initiated by Ki-Tung Wang as a short-cut method for the analysis of electrical networks. It was later popularized by Duffin and has since found numerous applications in electrical engineering and graph theory. This is a semi-tutorial paper on Wang algebra, its history, and modern applications. We expand Duffin’s historic notes on Wang algebra to give a full account of Ki-Tung Wang’s life. A short proof of Wang algebra using group theory is presented. We exemplify the usefulness of Wang algebra in the design of T-coils. Bridged T-coils give a significant advantage in bandwidth, and were widely adopted in Tektronix oscilloscopes, but design details were guarded as a trade secret. The derivation presented in this paper, based on Wang algebra, is more general and simpler than those reported in literature. This novel derivation has not been shared with the public before.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"274-285"},"PeriodicalIF":0.0,"publicationDate":"2022-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/9684754/09930827.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41881318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Loop Dynamics Analysis of PAM-4 Mueller–Muller Clock and Data Recovery System","authors":"Kunal Yadav;Ping-Hsuan Hsieh;Anthony Chan Carusone","doi":"10.1109/OJCAS.2022.3211844","DOIUrl":"10.1109/OJCAS.2022.3211844","url":null,"abstract":"This paper provides a framework for analyzing the loop dynamics of the clock and data recovery (CDR) system of ADC-based PAM-4 receivers, which will assist in extending the timing recovery loop bandwidth. This paper formulates an accurate linear model of linear and signed Mueller–Muller phase detector for baud-rate clock recovery. Different equalization configurations of continuous-time linear equalizer (CTLE) and feed-forward equalizer (FFE) are evaluated from a phase detector performance perspective to enable high CDR loop bandwidth. The impact of loop latency on the timing recovery of ADC-based PAM-4 receivers is also analyzed and demonstrated using accurate behavioral simulations. The analysis and behavioral results show that, to achieve high CDR loop bandwidth with a good jitter tolerance, the phase detector gain to noise ratio should be maximized, and CDR loop latency should be minimized.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"216-227"},"PeriodicalIF":0.0,"publicationDate":"2022-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9910561","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62854461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"UP-GDBF: A 19.3 Gbps Error Floor Free 4KB LDPC Decoder for NAND Flash Applications","authors":"Li-Wei Liu;Yen-Chin Liao;Hsie-Chia Chang","doi":"10.1109/OJCAS.2022.3209152","DOIUrl":"10.1109/OJCAS.2022.3209152","url":null,"abstract":"An error floor phenomenon, decoding performance, and throughput are three major concerns for LDPC decoders in NAND Flash applications. With a penalty method and an active iteration mechanism, we present a Unified Penalty Gradient Descent Bit Flipping (UP-GDBF) decoding algorithm, which not only possesses error-floor free property but also improves convergence speed in decoding performance. To fulfill the high-throughput requirement while maintaining reliable error correction capability, we propose an energy-based backtracking scheme to reduce 40% latency with a negligible 0.8% area overhead. Implemented in TSMC 16nm process, the proposed 4KB LDPC decoder can achieve a throughput of 19.3 Gbps with 0.120 mm2 area to satisfy ONFI 5.0 throughput requirement. Compared to existing approaches, our decoder architecture provides superior data rate and decoding performance in both 1KB and 4KB LDPC codes.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"228-236"},"PeriodicalIF":0.0,"publicationDate":"2022-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9902993","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62853951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Demonstrating Analog Inference on the BrainScaleS-2 Mobile System","authors":"Yannik Stradmann;Sebastian Billaudelle;Oliver Breitwieser;Falk Leonard Ebert;Arne Emmel;Dan Husmann;Joscha Ilmberger;Eric Müller;Philipp Spilger;Johannes Weis;Johannes Schemmel","doi":"10.1109/OJCAS.2022.3208413","DOIUrl":"10.1109/OJCAS.2022.3208413","url":null,"abstract":"We present the BrainScaleS-2 mobile system as a compact analog inference engine based on the BrainScaleS-2 ASIC and demonstrate its capabilities at classifying a medical electrocardiogram dataset. The analog network core of the ASIC is utilized to perform the multiply-accumulate operations of a convolutional deep neural network. At a system power consumption of 5.6W, we measure a total energy consumption of \u0000<inline-formula> <tex-math>$mathrm {192 ~mu text {J} }$ </tex-math></inline-formula>\u0000 for the ASIC and achieve a classification time of 276 \u0000<inline-formula> <tex-math>$mu$ </tex-math></inline-formula>\u0000s per electrocardiographic patient sample. Patients with atrial fibrillation are correctly identified with a detection rate of (93.7 ± 0.7)% at (14.0 ± 1.0)% false positives. The system is directly applicable to edge inference applications due to its small size, power envelope, and flexible I/O capabilities. It has enabled the BrainScaleS-2 ASIC to be operated reliably outside a specialized lab setting. In future applications, the system allows for a combination of conventional machine learning layers with online learning in spiking neural networks on a single neuromorphic platform.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"3 ","pages":"252-262"},"PeriodicalIF":0.0,"publicationDate":"2022-09-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/9684754/09896927.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43738811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}