IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems最新文献

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Energy harvesting using symmetrical electrostatic generators 利用对称静电发生器收集能量
A. Queiroz
{"title":"Energy harvesting using symmetrical electrostatic generators","authors":"A. Queiroz","doi":"10.1109/ISCAS.2016.7527324","DOIUrl":"https://doi.org/10.1109/ISCAS.2016.7527324","url":null,"abstract":"This paper describes possible regenerative electrostatic generators that can be obtained when two variable capacitors are used, in a symmetrical configuration. The studied structures require also two load capacitors and four switches or diodes, and produce two opposite output voltages. It is shown that some versions can produce a voltage multiplication factor per cycle that can reach 2. 618, greater than the maximum of 2 of the previously studied devices based on Bennet's doubler. As those, the proposed structures a re also compatible with microelectromechanical systems, and may be suitable for energy harvesting applications.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"4 1","pages":"650-653"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80962025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A Single Switcher Combined Series Parallel Hybrid Envelope Tracking Amplifier for Wideband RF Power Amplifier Applications. 用于宽带射频功率放大器的单开关组合串并联混合包络跟踪放大器。
Nijad Anabtawi, Rony Ferzli, Haidar M Harmanani
{"title":"A Single Switcher Combined Series Parallel Hybrid Envelope Tracking Amplifier for Wideband RF Power Amplifier Applications.","authors":"Nijad Anabtawi, Rony Ferzli, Haidar M Harmanani","doi":"10.1109/ISCAS.2016.7539060","DOIUrl":"https://doi.org/10.1109/ISCAS.2016.7539060","url":null,"abstract":"In this paper, an improved architecture for RF power amplifier envelope tracking supply modulator is presented. It consists of a single switched mode supply regulator and one linear regulator. The switched mode supply regulator has two outputs, one of which is used in conjunction with the linear regulator to provide a wideband, high efficiency power supply to the RF amplifier, whereas the second output provides a band limited high efficiency supply to the linear regulator. The design offers improved power efficiency, reduced system complexity and area savings since the dual output switched mode regulator requires one inductor and a simple control loop. The design was implemented in 14nm CMOS process and validated with simulations. The supply modulator achieves a peak efficiency of 74% with a 6 dB PAPR 20MHz LTE signal at 29dBm output power.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"2016 ","pages":"2366-2369"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.2016.7539060","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"35413910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers. 用于包络跟踪射频功率放大器的全数字快速跟踪开关转换器和可编程序环控制器。
Nijad Anabtawi, Rony Ferzli, Haidar M Harmanani
{"title":"An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers.","authors":"Nijad Anabtawi,&nbsp;Rony Ferzli,&nbsp;Haidar M Harmanani","doi":"10.1109/ISCAS.2016.7538892","DOIUrl":"https://doi.org/10.1109/ISCAS.2016.7538892","url":null,"abstract":"<p><p>This paper presents a step down, switched mode power converter for use in multi-standard envelope tracking radio frequency power amplifiers (RFPA). The converter is based on a programmable order sigma delta modulator that can be configured to operate with either 1<sup>st</sup>, 2<sup>nd</sup>, 3<sup>rd</sup> or 4<sup>th</sup> order loop filters, eliminating the need for a bulky passive output filter. Output ripple, sideband noise and spectral emission requirements of different wireless standards can be met by configuring the modulator's filter order and converter's sampling frequency. The proposed converter is entirely digital and is implemented in 14nm bulk CMOS process for post layout verification. For an input voltage of 3.3V, the converter's output can be regulated to any voltage level from 0.5V to 2.5V, at a nominal switching frequency of 150MHz. It achieves a maximum efficiency of 94% at 1.5 W output power.</p>","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"2016 ","pages":"1690-1693"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.2016.7538892","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"35520514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Enhanced Light-Load Efficiency Step Down Regulator with Fine Step Frequency Scaling. 一种具有精细阶跃频率缩放的增强型轻载效率降压调节器。
Nijad Anabtawi, Rony Ferzli, Haidar M Harmanani
{"title":"An Enhanced Light-Load Efficiency Step Down Regulator with Fine Step Frequency Scaling.","authors":"Nijad Anabtawi,&nbsp;Rony Ferzli,&nbsp;Haidar M Harmanani","doi":"10.1109/ISCAS.2016.7539149","DOIUrl":"https://doi.org/10.1109/ISCAS.2016.7539149","url":null,"abstract":"<p><p>This paper presents a switching DC-DC Buck converter with enhanced light-load efficiency for use in noise-sensitive applications. Low noise, spur free operation is achieved by using a sigma-delta-modulator (ΣΔ) based controller, while light load efficiency is realized through the introduction of fine step frequency scaling (FSFS) which continuously adjusts the switching frequency of the converter with load conditions. Regulation efficiency is further improved by adoption of mode hopping (continuous conduction mode (CCM)/discontinuous conduction mode (DCM)) and utilization of a fully digital implementation. Furthermore, the presented converter maintains low output voltage ripple across its entire load range by reconfiguring the ΣΔ modulator's quantization step and introducing dither to the loop filter. The proposed modulator was implemented in 14nm bulk CMOS process and validated with post layout simulations. It attains a peak efficiency of 95% at heavy load conditions and 79% at light loads with a maximum voltage ripple of 15mV at light loads.</p>","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"2016 ","pages":"2695-2698"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.2016.7539149","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"35413912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An ultra-low power low-IF GFSK demodulator for Bluetooth-LE applications 一款超低功耗低中频GFSK解调器,适用于蓝牙- le应用
M. Pereira, J. Vaz, C. Leme, J. Sousa, J. C. Freire
{"title":"An ultra-low power low-IF GFSK demodulator for Bluetooth-LE applications","authors":"M. Pereira, J. Vaz, C. Leme, J. Sousa, J. C. Freire","doi":"10.1109/ISCAS.2015.7168861","DOIUrl":"https://doi.org/10.1109/ISCAS.2015.7168861","url":null,"abstract":"This paper presents a digital low-IF Gaussian frequency-shift keying (GFSK) demodulator. The demodulator is based on a phase-shift quadrature discriminator. A preamble detector controls the sequencing of the blocks operation to minimize power consumption. An IF input signal of 1 MHz is used, the same of the data rate, hence, allowing a low-power receiver implementation. The implementation is fully digital with a silicon area of 0.06 mm2 in 130 nm process. Simulations show a state-of-art current consumption of about 143 μA from a single 1.2 V supply voltage. The proposed demodulator requires a SNR of 15 dB for a BER of 0.1 % for up to ± 200 kHz frequency offset variation.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"43 1","pages":"1226-1229"},"PeriodicalIF":0.0,"publicationDate":"2015-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80082441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Analysis of the operation of a regenerative electrostatic energy harvester 蓄热式静电能量采集器的运行分析
A. Queiroz
{"title":"Analysis of the operation of a regenerative electrostatic energy harvester","authors":"A. Queiroz","doi":"10.1109/ISCAS.2015.7168823","DOIUrl":"https://doi.org/10.1109/ISCAS.2015.7168823","url":null,"abstract":"The operation of an electrostatic energy harvester based on the electrostatic generator known as “Bennet's doubler,” is analyzed in detail, with the objective of finding the relations of the capacitance values, frequency of operation, and other parameters, with the resulting waveforms and the harvested power when the device is used in conjunction with a DC/DC converter. The results are compared with simulations, and are verified with a macroscopic physical prototype with parameters similar to a microelectromechanical version.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"25 1","pages":"1074-1077"},"PeriodicalIF":0.0,"publicationDate":"2015-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83273079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Limit of the Accuracy of Parameter Estimation for Two Molecules Moving in Close Proximity. 两分子近距离运动时参数估计精度的限制。
Zhiping Lin, Yau Wong, Raimund J Ober
{"title":"Limit of the Accuracy of Parameter Estimation for Two Molecules Moving in Close Proximity.","authors":"Zhiping Lin,&nbsp;Yau Wong,&nbsp;Raimund J Ober","doi":"10.1109/ISCAS.2015.7168665","DOIUrl":"https://doi.org/10.1109/ISCAS.2015.7168665","url":null,"abstract":"<p><p>Biomolecular interactions are central to biological processes and typically take place at nanometer scale distances. They often involve molecular motion which is known to affect the accuracy of the parameter estimates. Therefore, in this paper, we consider a case of two closely spaced molecules with planar trajectory and present a general expression of the Fisher information matrix in terms of their trajectory from which the benchmark for the accuracy of the parameter estimates is obtained. Through simulations, we show its application in the case of two moving objects and another case where only one of the two objects is moving. It is shown that the deterioration of the limit of the accuracy is not only dependent on the proximity of their starting position but also on their speed and direction of movement. The effect of differing photon emission intensities on the limit of the accuracy of parameter estimation is also investigated.</p>","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"2015 ","pages":"441-444"},"PeriodicalIF":0.0,"publicationDate":"2015-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.2015.7168665","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"33996987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Area optimization of lightweight lattice-based encryption on reconfigurable hardware 可重构硬件上基于格子的轻量级加密的面积优化
T. Pöppelmann, T. Güneysu
{"title":"Area optimization of lightweight lattice-based encryption on reconfigurable hardware","authors":"T. Pöppelmann, T. Güneysu","doi":"10.1109/ISCAS.2014.6865754","DOIUrl":"https://doi.org/10.1109/ISCAS.2014.6865754","url":null,"abstract":"Ideal lattice-based cryptography gained significant attraction in the last years due to its versatility, simplicity and performance in implementations. Nevertheless, existing implementations of encryption schemes reported only results trimmed for high-performance what is certainly not sufficient for all applications in practice. To the contrary, in this work we investigate lightweight aspects and suitable parameter sets for Ring-LWE encryption and show optimizations that enable implementations even with very few resources on a reconfigurable hardware device. Despite of this restriction, we still achieve reasonable throughput that is sufficient for many today's and future applications.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"79 1","pages":"2796-2799"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75892181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
An overview of decimator structures for efficient sigma-delta converters: Trends, design issues and practical solutions 高效sigma-delta转换器的十进制结构概述:趋势、设计问题和实际解决方案
G. Salgado, G. Jovanovic-Dolecek, J. M. Rosa
{"title":"An overview of decimator structures for efficient sigma-delta converters: Trends, design issues and practical solutions","authors":"G. Salgado, G. Jovanovic-Dolecek, J. M. Rosa","doi":"10.1109/ISCAS.2014.6865454","DOIUrl":"https://doi.org/10.1109/ISCAS.2014.6865454","url":null,"abstract":"Classical decimation structures usually use comb filters at first stage due to the simplicity of comb filters. However, comb filters cannot satisfy high performance demands of state-of-the-art Sigma-Delta (ΣΔ) analog-digital converters (ADCs). Some possible solutions are comb based structures which are power and area efficient and posses an improved magnitude characteristic. The principal issues in the comb-based filter design are: power and area efficiency, high alias rejection and approximately flat passband characteristic, considering also high values of the decimation factors. In this paper we first review the new trends in ΣΔ ADCs and demands for the decimation block design. Next we review power and area efficient structures. The methods to improve the alias rejection of comb filters, as well as the methods for the compensation for the comb passband droop, and those strategies which simultaneously improve the alias rejection and the passband droop are reviewed in the following. Finally we review the multirate decimation structures.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"24 1","pages":"1592-1595"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81038981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems 现场演示:使用SIMULINK s功能对模拟集成电路和系统进行有效的建模和仿真
J. M. Rosa
{"title":"Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems","authors":"J. M. Rosa","doi":"10.1109/ISCAS.2014.6865160","DOIUrl":"https://doi.org/10.1109/ISCAS.2014.6865160","url":null,"abstract":"This demo shows how to implement efficient behavioral modeling and simulation techniques for the systematic design of analog circuits and systems in MATLAB/SIMULINK. The methodology described in the demo is based on the use of C-coded SIMULINK S-functions to develop precise models of analog circuits, which allow designers to simulate complex systems with reduced simulation time, while keeping high accuracy. This simulation approach can be combined with an optimizer to automate the high-level synthesis and verification of many different analog integrated systems. As an application, two different toolboxes developed using the proposed techniques are illustrated in this demo: one is intended for the simulation of wireless receivers and the other one focuses on Σ∆ data converters. Through the multiple examples included in these toolboxes, visitors will experience the philosophy behind the presented approach and will learn how to apply it to their own designs and projects. ISCAS Track: Analog Signal Processing.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"437"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82388652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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