2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)最新文献

{"title":"Evaluation of high temperature reliability of SiC die attached structure with sinter micron-size Ag particles paste on Ni-P/Pd/Au plated substrates","authors":"Chuantong Chen, Zheng Zhang, K. Suganuma","doi":"10.1109/ESTC48849.2020.9229850","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229850","url":null,"abstract":"Next generation power modules empowered by wide bandgap semiconductors like SiC and GaN can operate for a higher power than Si-based semiconductors at a high temperature over 250 °C. Ag sinter joining as a die attach material with a high melting point and good thermal conductive properties have obtained many attentions for the next generation power modules. This study investigated the bonding properties and the high temperature reliability of Ag sinter joining on ENEPIG (Electroless Ni plating (EN), Electroless palladium plating (EP) and immersion gold plating (IG)) metallized DBA substrates. The initial die shear strength for SiC (3x3 mm2) power modules was 33.9 MPa at 250°C sintering without assisted pressure in air conduction. The high temperature reliability of Ag sinter joint structure was evaluated at 250°C aging for 1000 h. The Ag-Au interface bonding mechanism, fracture behaviors and microstructure evolution of sinter Ag-Au joint were systematically analyzed. In addition, the connected Ag particles change to coarse with pore size increase during the aging process. The Ag-Au inter-diffusion layer also increased with the aging time but not clearly delamination occurrence. The die shear strength was slightly increased from the initial to 36.5 MPa after aging 1000 h, which meaning the Ag-Au joint possessed a good high temperature reliability. This study should add the understanding of the reliability issues of Ag sinter joining on Au finished substrate for its applications at high temperature.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"98 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79250844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"MEMS thermoelectric power chip for large scale thermal energy harvesting","authors":"Zhiyu Hu, Erzhen Mu, Zhenhua Wu","doi":"10.1109/ESTC48849.2020.9229864","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229864","url":null,"abstract":"The fabrication of a micro/nano-scale thermoelectric module is very challenging. In this paper, a reliableand efficient hybrid fabrication method for ultrathin thermoelectric devices based on the non-contact exposing, photoresist melting and microfabrication technology is presented. The total thickness of the thermoelectric module is about 1 μm. Experimental results indicate that ultrathin thermoelectric device works stable and reliable, and demonstrate that the method presented is suitable for fabrication of thinner and higher integrality devices beyond TE devices in the micro-nanoscale range. The peak output power density is 0.29 W/m2 and 2.9×105 W/m3. The present research can provide a useful guide for the design of a micro/nano-scale thermoelectric device in the near future. Additionally, we have demonstrated a novel energy utilization that thermoelectric generation (TEG) device can achieve self-powering by radiative cooling (RC) continuously. An ultrathin TEG with a multilayer thermal emitter was fabricated to convert the heat from the environment into electricity directly by using radiative cooling. The TEG device was consisted of more than 46,000 P-N modules in series, and each two TE modules were connected by air bridge. Thermal emitter had 80.8% emissivity in the atmospheric window (8–13 μm). Besides, maximum temperature drop of 4 K was achieved. With zero energy input, the MEMS chip output voltage of the TEG-RC reached up to 0.5 mV, and the TEG-RC exhibited a continuous average 0.18 mV output for 24 h. Extreme temperature gradients were surprisingly formed in cross section of 1.5 μm thick for micro/nano film materials. In order to improve the thermoelectric efficiency, the crossplane thermal conductivities of nano-constructed Sb2Te3/(Cu, Ag, Au, Pt) thermoelectric multilayer thin films have been measured using time-domain thermo reflectance method. The interface morphology features of multilayer thin film samples were characterized by using scanning and transmission electron microscopes. The effects of interface microstructure on the cross-plane thermal conductivities of the multilayer thin films have been extensively examined and the thermal transfer mechanism has been explored. The results indicated that electron–phonon coupling occurred at the semiconductor/metal interface that strongly affected the cross-plane thermal conductivity. This work presents both experimental and theoretical understanding of the thermal transport properties of Sb2Te3/metal multilayer thin film junctions with important implications for exploring a novel approach to improving the thermoelectric conversion efficiency.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"1 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79897444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Interconnections of Low-Temperature Solder and Metallizations","authors":"Yi-Wun Wang, C. Kao","doi":"10.1109/ESTC48849.2020.9229849","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229849","url":null,"abstract":"The development of solder is from Pb-bearing to Pb-free solder because of toxin. Nowadays, Sn-based solder is usually chosen as the prime materials in electronic packaging. However, the melting point of Sn-based solder is higher than Pb-bearing solder about 40 °C. High process temperature causes the side effects on devices such as warpage, crack and damage. Requiring the melting point of solder is below 200 °C to overcome thermal budget. In is a good candidate to replace Sn owing to its good mechanical properties. Recently, a Cu/In structure is developed for 3D integration applications. Nevertheless, fewer researches investigate low temperature reaction between Cu and In. Previous literature of Cu-In interfacial reactions focused on thick In layer and high temperature reactions. Studying thin In layer and low temperature reactions are important for 3D IC integration. Microstructure evolution of Cu-In compounds at low-temperature are regarded as useful database for interfacial reaction. This study not only concentrates on Cu/In reaction but also discusses deeply the reaction between Cu, In and Ni. Electroplating In layer on Cu metallization and subsequently electroplating Ni on In. The electroplating procedure is one of the major challenges because of the rapid diffusion of Cu and In. Microstructure observation are from 100 °C to 140 °C. The samples were mounted in epoxy resin and ground with SiC paper and Al2O3 powders. The reaction zone was observed using an optical microscope and a scanning electron microscope (SEM). The compositions of Cu-In and Ni-In compounds were determined using an electron microprobe (FE-EPMA). The main results were as follows: (1) (Cu,Ni)In2 formation after electroplating, (2) (Cu,Ni)In2 is stable at 100 °C, (3) (Cu,Ni)11In9 is dominant phase at 140 °C, (4) Microvoids within (Cu,Ni)11In9 and (Ni,Cu)3In7 formation at 140 °C. The result provides detailed Cu-In and Ni-In compounds development and key findings related to the reliability of In-based solder. This study presents the growth of intermetallic compounds in Cu/In/Ni scheme resulting from aging at 100 °C and 140 °C.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"2 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86129789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Laser bonding of copper ribbons and clips on SiC power MOSFETs with sintered copper bond buffers","authors":"N. Pavliček, Fabian Mohn","doi":"10.1109/ESTC48849.2020.9229724","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229724","url":null,"abstract":"The source (emitter) contact of MOSFETs (IGBTs) is one of the most sensitive joints of power semiconductor modules. Due to limitations with regards to current density and power cycling reliability, state-of-the-art aluminum wire bonding is replaced, for example, by copper wire or ribbon bonding. In this study, a novel laser micro welding technology has been implemented to connect the source contact of 1.2 kV SiC MOSFETs reinforced by silver-sintered copper bond buffer top plates. The feasibility of laser bonding of 0.3 mm thick copper ribbons or 0.15 mm thick copper clips has been investigated on bond buffer top plates of 0.1 mm or 0.15 mm thickness.The laser bonding process was optimized by optical inspection of the weld seam, shear strength measurements of the bonds, analysis of polished micrograph sections, and electrical characterization of the power MOSFETs. Shear strength values exceeding 200 MPa have been repeatedly achieved for all material combinations. Results of electrical characterization are promising, and optically impeccable welding seams strongly correlate with electrically functional semiconductor devices. Power cycling of encapsulated power modules is currently ongoing, and results will be presented.An outlook is given on future measures to further improve the laser bonding process, and we discuss how laser bonding compares to other advanced topside interconnection methods.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"82 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87014320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Real embedding process of SiC devices in a monolithic ceramic package using LTCC technology","authors":"C. Lenz, S. Ziesche, A. Schletz, Hoang Linh Bach, T. Erlbacher","doi":"10.1109/ESTC48849.2020.9229653","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229653","url":null,"abstract":"Low temperature co-fired ceramics (LTCC) is a well-established multilayer technology for the fabrication of reliable and robust ceramic circuit boards, microsystems and sensor packages. Its ability to combine several single layer which can be geometrically and functionally structured in individual and the combination of a multitude of materials co-fired to a monolithic body distinguishes this technology in particular. In this contribution we utilize the advantages of the LTCC technology to investigate a real embedding process of Silicon carbide (SiC) semiconductor devices in a ceramic multilayer substrate during the co-firing process of the ceramic. For this purpose we investigated the shrinkage behavior of three commercial LTCC material systems (GT 951, 9k7, L8) to provide \"zero-shrinkage\" of the ceramic body, which is required for a mechanical and electrical joining of solid bodies as SiC devices in the LTCC multilayer. Within these results we evaluated the embedding of 2 mm and 5 mm SiC chips by varying several parameters to evaluate a feasible material and parameter combination. Finally the embedding results in regard to the material properties of the LTCC materials are discussed.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"77 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84060538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Finite Element simulations and Raman measurements to investigate thermomechanical stress in GaN-LEDs","authors":"F. Conti, E. Liu, Sri Krishna Bhogaraju, B. Wunderle, G. Elger","doi":"10.1109/ESTC48849.2020.9229843","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229843","url":null,"abstract":"Typical failures in microelectronics range from misalignments, non-uniform filling, delamination, missing solder bumps, large voids and cracking. Many non-destructive methods are available to inspect and detect these functional faults. Raman spectroscopy and Finite Element Modeling are applied to analyze and predict stress phenomena in gallium nitride (GaN) crystals grown on sapphire and implemented in blue light emitting diodes. The LEDs are assembled onto copper substrates by AuSn reflow soldering. The manufacturing process is simulated through FEM to investigate the stress distribution on the GaN layer. To validate the model, Raman measurements are performed to study the change in position of peaks in the spectrum in relation to the stress phenomena. Compressive stress with values of ca. 1400 MPa are recorded in the central area of the LEDs. Along the borders and at the corners, relaxation processes occur. The validation of the model allows to predict the behavior of the semiconductors in different thermal regimes, between -50 and 180 °C. The stress values do not change linearly by increasing the temperature. To take AuSn creep pohenomena in the FEM into account, after cross sectioning of the assembly, nanoindentation measurements were performed and creep deformation on the AuSn interconnection was measured at room temperature.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"20 1","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84034072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Piezoelectric properties of roll-to-roll fabricated polylactic acid films","authors":"S. Tuukkanen, J. Toriseva, A. Pammo, J. Virtanen, J. Lahti","doi":"10.1109/ESTC48849.2020.9229788","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229788","url":null,"abstract":"In this work, we report functionality of polylactide acid (PLA) as piezoelectric degradable material, which has given in the preliminary studies the piezoelectric sensitivities are on the range of 10 pC/N, depending on PLA film details. However, this is very promisingly close to commercial alternatives, such as fluoropolymer polyvinylidene fluoride (PVDF), which is expensive fluoropolymer, not biodegradable or recyclable. Further, we have demonstrated the manufacturing of PLA films in roll-to-roll pilot line, which gives the promise that this type of sensors could act as elements in the future trillion sensors vision, where the large number of individual sensors are required.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"35 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85916137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Die-to-Wafer 3D Interconnections Operating at Sub-Kelvin Temperatures for Quantum Computation","authors":"C. Thomas, J. Charbonnier, A. Garnier, N. Bresson, F. Fournel, S. Renet, R. Franiatte, N. David, V. Thiney, M. Urdampilleta, T. Meunier, M. Vinet","doi":"10.1109/ESTC48849.2020.9229657","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229657","url":null,"abstract":"To reach quantum supremacy, large scale integration of quantum bits through three dimensional (3D) architectures functional at sub-Kelvin temperatures is required. Electrical signals are transferred by 3D interconnects which need to be carefully designed in term of materials and dimensions to optimize the whole system performance. To that end, 20 μm pitch daisy chains with more than 20000 SnAg microbump-based interconnects and more than 1000 direct Cu bond ones have been fabricated with die-to-wafer processes developed on 300 mm Si wafers. Daisy chain resistances have been measured in a liquid nitrogen deware and in a He3 cryostat at the following thermal steps: 300 K, 77 K, 4 K and 400 mK, allowing to extract unitary link resistances to establish preliminary process design kits at these low temperatures. The mechanical and electrical robustness of these interconnects has been validated through the repeatability of the resistance measurements over several thermal cycles.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"1 1","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83020901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Flexible and stretchable redistribution layer with embedded chips for human-machine interface","authors":"M. Schubert, L. Wambera, Olha Mudrievska, K. Nieweglowski, J. Wagner, J. Partzsch, C. Mayr, F. Ellinger, K. Bock","doi":"10.1109/ESTC48849.2020.9229694","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229694","url":null,"abstract":"Suitable stretchable electronics is the key to promote future human-machine collaboration to facilitate processes in daily life. Sensors and actuators on humans will enable a close and yet unhesitating interaction with robots by translating data between biological and technical systems. This paper describes our first approach for chip integration and stretchable interconnect manufacturing in order to achieve reliable stretchable interconnects. Therefore inkjet printed silver horseshoe-interconnects with a radius of 500µm on spin coated polyurethane substrate are tested on a self-developed stretch test setup. More than 400 stretch and release cycles on 10% and 20% stretching were achieved. Furthermore, a polymer chip-embedding process by polymer casting is shown to apply fan-out redistribution layer directly on thin chip carrier. Those carriers can be integrated in stretchable foils in order to achieve miniaturized and low-profile assemblies for human-machine interfaces.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"109 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80891844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A frequency-domain thermoreflectance method for measuring the thermal boundary conductance of a metal-polymer system","authors":"S. Sandell, J. Maire, E. Chávez‐Ángel, C. S. Sotomayor Torres, Jianying He","doi":"10.1109/ESTC48849.2020.9229862","DOIUrl":"https://doi.org/10.1109/ESTC48849.2020.9229862","url":null,"abstract":"The use of nanostructures in electronic devices has opened up a new field of challenges in thermal management, where standard thermal measurement techniques reach their limits. An especially challenging scenario is related to the thermal transport at interfaces between dissimilar materials. In these interfaces, a considerable thermal resistance arises. As the number of interfaces per area increases, the interface thermal resistance becomes a limiting factor in heat dissipation of the device, impeding the heat flow out of the device. In this work, we describe a contactless, optothermal method for measuring the thermal boundary conductance (TBC) of heterointerfaces, the frequency-domain thermoreflectance (FDTR) method. The method is demonstrated by measuring TBC between gold and polymethyl methacrylate (PMMA). By inserting a nickel nanofilm between gold and PMMA, the TBC increases from 59 MW/m2K to 139 MW/m2K.","PeriodicalId":6785,"journal":{"name":"2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC)","volume":"82 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2020-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81711832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}