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2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)最新文献

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First-Principles Investigation of Paramagnetic Centers in P2 O5 Based Glasses p2o5基玻璃顺磁中心的第一性原理研究
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870486
L. Giacomazzi, L. Martin-Samos, N. Richard, M. Valant, N. Ollier
{"title":"First-Principles Investigation of Paramagnetic Centers in P2 O5 Based Glasses","authors":"L. Giacomazzi, L. Martin-Samos, N. Richard, M. Valant, N. Ollier","doi":"10.1109/SISPAD.2019.8870486","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870486","url":null,"abstract":"We present a first-principles investigation of paramagnetic centers in P<inf>2</inf> O<inf>5</inf> based on the calculation of electron paramagnetic resonance (EPR) parameters (g -tensor and Fermi contacts). Calculations of the EPR parameters for the P<inf>1</inf> configuration in crystalline $o'$(P<inf>2</inf> O<inf>5</inf>) support the previous attribution of the P<inf>1</inf> to a P-defect structurally analogous to the Si-${E'}$ center. As far as concerns the P<inf>1</inf> center in glassy P<inf>2</inf> O<inf>5</inf>, the present work suggests the possible occurrence of another configuration besides the analogue of the Si-${E'}$ center. Such an alternative P<inf>1</inf> center configuration is likely to be relevant for those P<inf>2</inf> O<inf>5</inf> based glasses featuring a considerable fraction of Q<inf>1</inf> and Q<inf>2</inf> tetrahedral units besides the Q<inf>3</inf> unit which dominates the structure of pure P<inf>2</inf> O<inf>5</inf>.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"8 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80154622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Numerical simulations of nanosecond laser annealing of Si nanoparticles for plasmonic structures 纳米硅等离子体结构纳秒激光退火的数值模拟
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870529
A. Royet, S. Kerdilès, P. Acosta Alba, C. Bonafos, V. Paillard, F. Cristiano, B. Curvers, K. Huet
{"title":"Numerical simulations of nanosecond laser annealing of Si nanoparticles for plasmonic structures","authors":"A. Royet, S. Kerdilès, P. Acosta Alba, C. Bonafos, V. Paillard, F. Cristiano, B. Curvers, K. Huet","doi":"10.1109/SISPAD.2019.8870529","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870529","url":null,"abstract":"This paper reports numerical simulations of nanosecond laser thermal annealing of plasmonic structures based on Si-nanoparticles embedded in a SiO2 matrix. From these simulations, we extracted guidelines for the structure design to be adopted. This study also investigates the expected laser annealing process window and the influence of nanoparticles coverage.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"2 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87491311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Hybrid Mode-Space/Real-Space Scheme for DFT+NEGF Device Simulations DFT+NEGF器件仿真的模式空间/实空间混合方案
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870571
F. Ducry, M. H. Bani-Hashemian, M. Luisier
{"title":"A Hybrid Mode-Space/Real-Space Scheme for DFT+NEGF Device Simulations","authors":"F. Ducry, M. H. Bani-Hashemian, M. Luisier","doi":"10.1109/SISPAD.2019.8870571","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870571","url":null,"abstract":"Density functional theory based simulation techniques enable thorough investigation of the operational characteristics of nanoscale devices regardless of their configurational complexity. However, this flexibility comes with considerable computational cost. In this work, we present a hybrid mode-space/real-space scheme that utilizes a mode-space basis to represent periodic contacts while maintaining the real-space representation of the central device region. Reducing the size of the contact blocks via mode-space approximation speeds up the calculation of the open boundary conditions and reduces the overall size of the Hamiltonian and overlap matrices, which leads to significant improvements in the computational efficiency of simulations. Keeping the real-space representation of the device blocks preserves the versatility and accuracy of the ab-initio approach. The merits of the proposed method are demonstrated with the simulation of an amorphous device with metallic contacts.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"14 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73111159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallelized Level-Set Velocity Extension Algorithm for Nanopatterning Applications 纳米图形应用的并行水平集速度扩展算法
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870482
Michael Quell, A. Toifl, A. Hössinger, S. Selberherr, J. Weinbub
{"title":"Parallelized Level-Set Velocity Extension Algorithm for Nanopatterning Applications","authors":"Michael Quell, A. Toifl, A. Hössinger, S. Selberherr, J. Weinbub","doi":"10.1109/SISPAD.2019.8870482","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870482","url":null,"abstract":"We present a parallelized algorithm for accelerating the velocity extension calculations in a level-set method, which is essential for surface velocity based topography simulations, such as etching or deposition simulations for nanopatterning applications. The proposed algorithm improves the prevailing fast marching method by optimizing the heap data structure and efficiently reordering the calculations. We implemented the algorithm into Silvaco’s Victory Process simulator, which is utilized for evaluating our algorithm with a three-dimensional simulation of an ion beam etching process used for spin-transfer torque magnetoresistive random access memory devices. Our results show a significant serial speed-up by a factor of at least 1.4 and a total speed-up by a factor of up to 8 using 8 threads for the velocity extension.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"68 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85610990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Device-to-circuit modeling approach to Metal – Insulator – 2D material FETs targeting the design of linear RF applications 针对线性射频应用设计的金属-绝缘体-二维材料场效应管的器件到电路建模方法
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870562
A. Toral-Lopez, F. Pasadas, E. G. Marín, A. Medina-Rull, F. Ruiz, D. Jiménez, A. Godoy
{"title":"Device-to-circuit modeling approach to Metal – Insulator – 2D material FETs targeting the design of linear RF applications","authors":"A. Toral-Lopez, F. Pasadas, E. G. Marín, A. Medina-Rull, F. Ruiz, D. Jiménez, A. Godoy","doi":"10.1109/SISPAD.2019.8870562","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870562","url":null,"abstract":"We present a physics-based device-to-circuit modeling approach to metal – insulator – 2D material based field-effect transistors (2DFETs). Starting from numerical simulations based on the self-consistent solution of the 2D Poisson and 1D Drift-Diffusion equations, we obtain the electrostatics and current-voltage characteristics of such devices. Then, assuming small-signal operation, a charge-based equivalent circuit is fed with the small-signal parameters computed from the numerical results and then it is implemented in a standard circuit simulator. This framework enables the design and assessment of linear radio-frequency applications based on novel and emergent 2DFETs. The approach has been applied to an experimental MoS2 transistor by benchmarking the transfer characteristics and then predicting the expected performance of such device as a common-source power amplifier, for instance a power gain of 8.6 dB at 2.45 GHz.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"27 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88786985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Numerical Investigation of the Photogating Effect in MoTe2 Photodetectors MoTe2光电探测器光门效应的数值研究
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870530
J. M. Gonzalez-Medina, E. G. Marín, A. Toral-Lopez, F. Ruiz, A. Godoy
{"title":"Numerical Investigation of the Photogating Effect in MoTe2 Photodetectors","authors":"J. M. Gonzalez-Medina, E. G. Marín, A. Toral-Lopez, F. Ruiz, A. Godoy","doi":"10.1109/SISPAD.2019.8870530","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870530","url":null,"abstract":"The necessity of overcoming the limitations (e.g. weight, cost and brittleness) of traditional bulk semiconductors employed to build conventional photodetectors, has fueled the interest of the scientific community towards two-dimensional crystals. Its most representative member, graphene [1], with outstanding electrical and mechanical properties, has however a severely limited photoresponsivity due to 1) the lack of bandgap and 2) a reduced carrier lifetime that hardly reaches a few picoseconds [2]. Greater expectations lay on Transition Metal Dichalcogenides (TMDs) [3], the bandgap of which is sensitive to the number of layers. Moreover, TMDs can be stacked forming vertical or lateral heterojunctions [4] giving rise to structures similar to field-effect transistors (FETs) that behave as photodetectors. In this work we theoretically study the optoelectronic properties of a backgated phototransistor, with its channel formed by few-layer MoTe2, and we focus on the role played by the charges trapped at the channel-insulator interface through the photogating effect [5, 6].","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"11 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87268941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Process Simulation in the Browser: Porting ViennaTS using WebAssembly 浏览器中的过程模拟:使用WebAssembly移植维也纳
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870374
X. Klemenschits, P. Manstetten, L. Filipovic, S. Selberherr
{"title":"Process Simulation in the Browser: Porting ViennaTS using WebAssembly","authors":"X. Klemenschits, P. Manstetten, L. Filipovic, S. Selberherr","doi":"10.1109/SISPAD.2019.8870374","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870374","url":null,"abstract":"We introduce a client-side browser application for high performance process simulation. The codebase is taken from ViennaTS, an open-source C++ process simulation engine, and completed with JavaScript based components, such as an editor to conFigure the simulation parameters and a result viewer. The C++ codebase is ported to the browser by compiling to a portable standard for an abstract instruction set: WebAssembly. We demonstrate the capabilities and performance of the application by performing several configurable simulations, including the emulation of the fabrication process of a stacked nanosheet field effect transistor. The simulations conducted in the browser application are only slower by a factor of 1.6 to 3.6 compared to native, single-thread simulations. Therefore, WebAssembly presents a promising format for portable and widely accessible high performance process simulations.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"16 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85039431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Negative Capacitance Field-Effect Transistor Based on a Two-Dimensional Ferroelectric 基于二维铁电的负电容场效应晶体管
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870372
Maryam Soleimani, N. Asoudegi, P. Khakbaz, Mahdi Pourfath
{"title":"Negative Capacitance Field-Effect Transistor Based on a Two-Dimensional Ferroelectric","authors":"Maryam Soleimani, N. Asoudegi, P. Khakbaz, Mahdi Pourfath","doi":"10.1109/SISPAD.2019.8870372","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870372","url":null,"abstract":"Negative capacitance field effect transistors (NCFETs) based on ferroelectric materials have been the focus of intensive research activities because of their relatively small sub-threshold swing. This work proposes and presents a comprehensive study of a NCFET based on few-layer $alpha$-In2 Se3 as the ferroelectric in order to reduce the sub-threshold swing through voltage amplification effect. By employing first principles electronic structure calculations, the Landau constants of mono and few-layer $alpha$-In2 Se3 are extracted which were utilized for analyzing the characteristics of a NCFET with a monolayer MoS2 as the channel material. Sub-threshold swings in the range of $sim 27 -59$ mV/dec were achieved for few-layer $alpha$-In2 Se3 that can be further improved by increasing the thickness of the ferroelectric layer and by using a thinner or high-$kappa$ insulate layer.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"15 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85865006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Electro-Thermal Analysis and Edge Termination Techniques of High Current β-Ga2 O3 Schottky Rectifiers 大电流β- ga2o3肖特基整流器的电热分析和边缘终止技术
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870536
R. Shanna, Elin Patlick, Jiancheng Yang, F. Ren, M. Law, S. Pearton
{"title":"Electro-Thermal Analysis and Edge Termination Techniques of High Current β-Ga2 O3 Schottky Rectifiers","authors":"R. Shanna, Elin Patlick, Jiancheng Yang, F. Ren, M. Law, S. Pearton","doi":"10.1109/SISPAD.2019.8870536","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870536","url":null,"abstract":"The performance and limitations of β-Ga2 O3 Schottky rectifiers is studied via simulation using the Florida Object Oriented Device and Process (FLOODS) TCAD simulator. The effect of forward bias and power is examined for various bulk and epitaxial layer thicknesses as well as for heat sink geometries. Thicker bulk/substrate results in higher maximum temperature values whereas a thinner epitaxial-layer results in higher forward currents and hence a higher maximum temperature values via Joule heating. A Cu finned heat sink geometry results in a 26.76% reduction in the maximum temperature. Edge termination techniques are examined for β-Ga2 O3 Schottky rectifiers in order to maximize the breakdown voltage, identify the location of breakdown and mitigate the maximum electric field. Best results have been observed for A1203 as the dielectric material in a field-plate structure while the effect of field-plate dimensions is also studied.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"104 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88120127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Advances in 3D CMOS image sensors optical modeling: combining realistic morphologies with FDTD 三维CMOS图像传感器光学建模研究进展:结合逼真形态和时域有限差分
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2019-09-01 DOI: 10.1109/SISPAD.2019.8870543
B. Vianne, A. Crocherie, S. Guissi, Danielle Sieger, S. Calderón, D. Rideau, H. Wehbe-Alause
{"title":"Advances in 3D CMOS image sensors optical modeling: combining realistic morphologies with FDTD","authors":"B. Vianne, A. Crocherie, S. Guissi, Danielle Sieger, S. Calderón, D. Rideau, H. Wehbe-Alause","doi":"10.1109/SISPAD.2019.8870543","DOIUrl":"https://doi.org/10.1109/SISPAD.2019.8870543","url":null,"abstract":"This paper describes an innovative methodology to investigate the relationship between device morphology and the optical performance of CMOS image sensors. By coupling a FDTD-based 3D Maxwell solver with silicon-accurate process modeling software, we have been able to analyze the sensitivity of image sensor quantum efficiency with respect to statistical variations in nm-scale device topology. Additionally, we studied pyramidal silicon structuration for quantum efficiency enhancement as proposed in [1].","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"7 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74740017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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