2018 IEEE International Symposium on Circuits and Systems (ISCAS)最新文献

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A Clock-Tuned Discrete-Time Negative Capacitor Implemented Using Analog Samplers 用模拟采样器实现的时钟调谐离散时间负电容
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351121
Donald M. Johnson, T. Weldon
{"title":"A Clock-Tuned Discrete-Time Negative Capacitor Implemented Using Analog Samplers","authors":"Donald M. Johnson, T. Weldon","doi":"10.1109/ISCAS.2018.8351121","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351121","url":null,"abstract":"The recent introduction of digital non-Foster circuits offers new methods for implementing negative capacitance and inductance, but may require a high-speed high-resolution digital signal processor, analog-to-digital converter, and digital-to-analog converter. Therefore, an alternative discrete-time design approach is presented, where a clock-tuned negative capacitor is implemented using analog samplers. The resulting design requires only two samplers, a differential amplifier, and an operational transconductance amplifier, eliminating the need for a digital signal processor and converters. In addition, it is shown that the negative capacitance can be tuned by the digital clock and is theoretically proportional to the clock period. Experimental results for a prototype demonstrate a tunable capacitance from −2.1 nF to −5.5 nF with |Q| > 2 for signal frequencies below approximately one-tenth of the clock frequency.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"99 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78046580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Weighted Hybrid Fusion for Multimodal Biometric Recognition System 多模态生物特征识别系统的加权混合融合
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351048
Waziha Kabir, M. Ahmad, M. Swamy
{"title":"Weighted Hybrid Fusion for Multimodal Biometric Recognition System","authors":"Waziha Kabir, M. Ahmad, M. Swamy","doi":"10.1109/ISCAS.2018.8351048","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351048","url":null,"abstract":"In this paper, first, a new fusion technique, referred to as hybrid fusion (HBF) technique, based on feature-level fusion and the best unimodal system for multimodal biometric system recognition, is proposed. Secondly, a new weighting technique, referred to as mean-extrema based confidence weighting (MEBCW) technique, based on the scores obtained from feature-level fusion and the best unimodal system, is proposed. Finally, a weighted hybrid fusion, referred to as weighted hybrid fusion (WHBF) technique, is developed by incorporating MEBCW in HBF, in order to improve the overall recognition rate of a multimodal biometric system. The performance of the proposed method, in terms of equal error rate and genuine acceptance rates @5.3% and @7.2% false acceptance rates, is evaluated on a multi-biometric system. The experimental results show that the performance of a multi-biometric systems using the proposed fusions is superior to that of the uni-biometric systems or to that of the system using existing level of fusions.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"42 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78265637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Continuous Respiratory Monitoring System Using Ultrasound Piezo Transducer 基于超声压电换能器的连续呼吸监测系统
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351359
Amirhossein Shahshahani, S. Bhadra, Z. Zilic
{"title":"A Continuous Respiratory Monitoring System Using Ultrasound Piezo Transducer","authors":"Amirhossein Shahshahani, S. Bhadra, Z. Zilic","doi":"10.1109/ISCAS.2018.8351359","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351359","url":null,"abstract":"Prolonged monitoring of breathing under different physical conditions is important in many applications for personal health tracking or in hospitals. Ultrasound technology has been used widely for imaging and diagnosis of the human body. In this work, we introduce the use of ultrasound for human respiratory monitoring. The proposed system measures the respiration rate by capturing ultrasound reflections from heart and surrounding organ motions due to the breathing. This system is based on ultrasound B-mode to measure the Time Of Flight (TOF), amplitude and phase of reflected ultrasound signals generated by piezo sensors working at 1 MHz. Experimental results show that the system can obtain respiratory signal with an accuracy of 89% as compared to a SPR-BTA spirometer. A prototype is designed with low complexity hardware, delivering 89% accuracy of the obtained respiratory signal in comparison to a SPR-BTA spirometer.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"15 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75411788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up 现场演示:带有片上太阳能电池的光能收集系统和冷启动
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351111
E. Ferro, V. Brea, P. López, D. Cabello
{"title":"Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up","authors":"E. Ferro, V. Brea, P. López, D. Cabello","doi":"10.1109/ISCAS.2018.8351111","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351111","url":null,"abstract":"This live demonstration is related to ISCAS track “4.5: Circuits & Systems for Energy Harvesting”. This live demo shows a micro-energy harvesting system which includes a 1 mm2 solar cell as the unique power source and a Power Management Unit (PMU) on the same substrate in standard 0.18 μm CMOS technology. The PMU has cold start-up from nW and it also performs a continuous and two-dimensional maximum power point tracking using analog strategies to meet very low power consumption, managing a high input power range. The system is used to power an off-chip NAND gate.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"148 1","pages":"1-1"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77917071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Perceptual Quality Assessment of Omnidirectional Images 全向图像的感知质量评价
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351786
Huiyu Duan, Guangtao Zhai, Xiongkuo Min, Yucheng Zhu, Yi Fang, Xiaokang Yang
{"title":"Perceptual Quality Assessment of Omnidirectional Images","authors":"Huiyu Duan, Guangtao Zhai, Xiongkuo Min, Yucheng Zhu, Yi Fang, Xiaokang Yang","doi":"10.1109/ISCAS.2018.8351786","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351786","url":null,"abstract":"Omnidirectional images and videos can provide immersive experience of real-world scenes in Virtual Reality (VR) environment. We present a perceptual omnidirectional image quality assessment (IQA) study in this paper since it is extremely important to provide a good quality of experience under the VR environment. We first establish an omnidirectional IQA (OIQA) database, which includes 16 source images and 320 distorted images degraded by 4 commonly encountered distortion types, namely JPEG compression, JPEG2000 compression, Gaussian blur and Gaussian noise. Then a subjective quality evaluation study is conducted on the OIQA database in the VR environment. Considering that humans can only see a part of the scene at one movement in the VR environment, visual attention becomes extremely important. Thus we also track head and eye movement data during the quality rating experiments. The original and distorted omnidirectional images, subjective quality ratings, and the head and eye movement data together constitute the OIQA database. State-of-the-art full-reference (FR) IQA measures are tested on the OIQA database, and some new observations different from traditional IQA are made. The OIQA database will be released to facilitate further research.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"18 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77995374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 100
A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC 电荷再分配SAR-ADC中基于电容失配的物理不可克隆函数
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351601
Qianying Tang, W. Choi, L. Everson, K. Parhi, C. Kim
{"title":"A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC","authors":"Qianying Tang, W. Choi, L. Everson, K. Parhi, C. Kim","doi":"10.1109/ISCAS.2018.8351601","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351601","url":null,"abstract":"A Physical Unclonable Function (PUF) using capacitor mismatch in a standard successive approximation register analog-to-digital converter (SAR-ADC) as the entropy source is demonstrated in 65nm CMOS. SAR-ADCs are readily available in many system-on-chips, making the hardware overhead of the proposed PUF almost negligible. The inherent process variation of metal-oxide-metal (MOM) capacitors is harnessed through a charge redistribution operation which is sampled by the voltage comparator. To enhance the stability of the PUF output, soft response generation and dynamic thresholding techniques were adopted. Finally, we verify that performing the enrollment operation at a lower operating voltage can ensure that PUF responses are stable at the nominal supply voltage used during authentication.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"2 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75219218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 16-bit Single-Slope based Pixel-level ADC for 15μm-pitch 640×512 MWIR FPAs 基于16位单斜率的像素级ADC,用于15μm间距640×512 MWIR fpa
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351099
Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen
{"title":"A 16-bit Single-Slope based Pixel-level ADC for 15μm-pitch 640×512 MWIR FPAs","authors":"Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen","doi":"10.1109/ISCAS.2018.8351099","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351099","url":null,"abstract":"This paper presents a pixel-level ADC for 640×512 mid-wavelength infrared focal plane arrays. The pulse comparator for windowed signal used in the single-slope structure proposed in this work obtains lower power consumption and lower RMS noise than conventional designs. Moreover, by employing a novel low-load 3T NMOS memory structure, hardware cost can be reduced. The pixel circuit with 15μm-pitch has been designed in the 0.18um 1P6M CMOS process. Power consumption of the pixel-level ADC is 0.107μW and the charge handling capacity is 10Me− per pixel. Depending on the simulation results, an average output RMS noise of 2LSB and a maximum nonlinearity of 0.15% are demonstrated.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"35 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76047490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique 一种低功率宽锁定范围双注入分频器
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8350910
Alessandro Garghetti, A. Lacaita, S. Levantino
{"title":"A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique","authors":"Alessandro Garghetti, A. Lacaita, S. Levantino","doi":"10.1109/ISCAS.2018.8350910","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8350910","url":null,"abstract":"A novel low-power and wide-locking-range divide-by-three injection-locked frequency divider with single inductor is presented in this paper. The classical topology with divide-by-two locking scheme is improved via the introduction of an extra tail-injection driven by the central node of the floating-source direct injector. This new concept is applied to the design of a 15GHz divider-by-three in a standard 65-nm LP CMOS technology, which reaches, in post-layout simulations at 100° C temperature, a 23.6% locking range at an input power of 0dBm and DC power consumption of 1.56mW. The divider figure of merit together with the compact size of only 0.09mm2 are best in class for injection-locking dividers with single inductor and same input power. The figure of merit is also very close to the values reached by the best injection-locking dividers-by-three, that, however, use more inductors.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"23 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73739533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Electroporation Improvement of Leukemic Cells Using Dielectrophoresis Technique 利用介电电泳技术改进白血病细胞的电穿孔
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351356
Sameh Sherif, Y. Ghallab, Y. Ismail
{"title":"Electroporation Improvement of Leukemic Cells Using Dielectrophoresis Technique","authors":"Sameh Sherif, Y. Ghallab, Y. Ismail","doi":"10.1109/ISCAS.2018.8351356","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351356","url":null,"abstract":"Electroporation is a powerful technique used to improve the permeability of the cell membrane; pores are created in the cell membrane based on the application of a high voltage. The high voltage improves the number of membrane pores, however, it might kill the cells. Electroporation is achieved using a microelectrode placed in a microfluidic device. This paper focuses on the improvement of the electroporation of a cell based on levitation dielectrophoresis and an electrorotation force. Then, the change of the conductivity is detected at both the frequency and time domain, i.e., individual cells are trapped due to the effect of levitation and electrorotation force, and then the variation in the conductivity is detected. We use frequency and time domain spectroscopy to measure the conductivity of the white blood cell, i.e., B-cell, T-cell and leukemia K365. In this paper, we review studies of conductivity separation in a microfluidic device based on a 2-D electrode system. Also, a comparison between the conductivity of leukemia k365, B-cell, and T-cell due to the drag and electrorotaional forces are presented and discussed.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"25 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74072450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
An Accurate Sense-FET-based Inductor Current Sensor with Wide Sensing Range for Buck Converters 一种用于降压变换器的高精度、宽量程感测fet电感电流传感器
2018 IEEE International Symposium on Circuits and Systems (ISCAS) Pub Date : 2018-05-27 DOI: 10.1109/ISCAS.2018.8351083
Yongjie Jiang, M. Swilam, Sita Asar, A. Fayed
{"title":"An Accurate Sense-FET-based Inductor Current Sensor with Wide Sensing Range for Buck Converters","authors":"Yongjie Jiang, M. Swilam, Sita Asar, A. Fayed","doi":"10.1109/ISCAS.2018.8351083","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351083","url":null,"abstract":"This paper introduces an accurate sense-FET-based inductor current sensor for buck converters. The proposed sensor utilizes nonlinear adaptive biasing to maintain consistent bandwidth and phase margin in the sensor's control loop across a wide range of load currents, leading to high sensing accuracy independent of the load. Moreover, auxiliary sensing FETs are proposed to eliminate sharp transitions in the sensed high-side and low-side currents as the buck converter switches between the ON and OFF phases. Eliminating these sharp transitions enables the bandwidths of the current sensor's control loop and the nonlinear adaptive biasing generator to be greatly relaxed without compromising sensing accuracy, leading to lower power consumption. The proposed sensor is implemented as part of a 2-MHz buck converter in a 0.5-μm standard CMOS technology. Simulation results of the proposed sensor show a 10% reduction in current sensing error at light loads (∼50mA) and 40 degrees of improvement in the phase margin of the sensor's control loop at heavy loads (∼5A), compared to conventional sense-FET-based current sensors. Furthermore, the variation in the unity gain frequency (UGF) of the proposed sensor's control loop across the entire load range is 4.5 times lower than that of conventional designs.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"10 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85527571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
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