Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen
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引用次数: 8
Abstract
This paper presents a pixel-level ADC for 640×512 mid-wavelength infrared focal plane arrays. The pulse comparator for windowed signal used in the single-slope structure proposed in this work obtains lower power consumption and lower RMS noise than conventional designs. Moreover, by employing a novel low-load 3T NMOS memory structure, hardware cost can be reduced. The pixel circuit with 15μm-pitch has been designed in the 0.18um 1P6M CMOS process. Power consumption of the pixel-level ADC is 0.107μW and the charge handling capacity is 10Me− per pixel. Depending on the simulation results, an average output RMS noise of 2LSB and a maximum nonlinearity of 0.15% are demonstrated.