M. Grady, Bradley Pepper, Joshua Patch, Mike Degregorio, P. Nigh
{"title":"Adaptive testing - Cost reduction through test pattern sampling","authors":"M. Grady, Bradley Pepper, Joshua Patch, Mike Degregorio, P. Nigh","doi":"10.1109/TEST.2013.6651891","DOIUrl":"https://doi.org/10.1109/TEST.2013.6651891","url":null,"abstract":"In this paper, we will present two different applications of “test pattern sampling” for logic testing that have significantly improved test cost for Processors and SOCs/ASICs at IBM. The drivers and implementations for these two methods were completely different - one relying on real-time analysis/optimization applied at wafer test; the other based on off-line analysis with daily updates and real-time adjustments at Final Test.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86158436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hongyan Zhang, L. Bauer, M. Kochte, E. Schneider, Claus Braun, M. Imhof, H. Wunderlich, J. Henkel
{"title":"Module diversification: Fault tolerance and aging mitigation for runtime reconfigurable architectures","authors":"Hongyan Zhang, L. Bauer, M. Kochte, E. Schneider, Claus Braun, M. Imhof, H. Wunderlich, J. Henkel","doi":"10.1109/TEST.2013.6651926","DOIUrl":"https://doi.org/10.1109/TEST.2013.6651926","url":null,"abstract":"Runtime reconfigurable architectures based on Field-Programmable Gate Arrays (FPGAs) are attractive for realizing complex applications. However, being manufactured in latest semiconductor process technologies, FPGAs are increasingly prone to aging effects, which reduce the reliability of such systems and must be tackled by aging mitigation and application of fault tolerance techniques. This paper presents module diversification, a novel design method that creates different configurations for runtime reconfigurable modules. Our method provides fault tolerance by creating the minimal number of configurations such that for any faulty Configurable Logic Block (CLB) there is at least one configuration that does not use that CLB. Additionally, we determine the fraction of time that each configuration should be used to balance the stress and to mitigate the aging process in FPGA-based runtime reconfigurable systems. The generated configurations significantly improve reliability by fault-tolerance and aging mitigation.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84289564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sen-Kuei Hsu, Hao Chen, Chung-Han Huang, Der-Jiann Liu, Wei-Hsun Lin, Hung-Chih Lin, C. Peng, Min-Jer Wang
{"title":"Test-yield improvement of high-density probing technology using optimized metal backer with plastic patch","authors":"Sen-Kuei Hsu, Hao Chen, Chung-Han Huang, Der-Jiann Liu, Wei-Hsun Lin, Hung-Chih Lin, C. Peng, Min-Jer Wang","doi":"10.1109/TEST.2013.6651888","DOIUrl":"https://doi.org/10.1109/TEST.2013.6651888","url":null,"abstract":"High-density probing is a main trend of the test technology. The warping issues of probe card are caused by the high-density test. The metal backer and patches are applied to solve this problem and the optimized sizes of backer and patches are decided by the proposed flow. Using the probe card with optimized backer and patches, the stability of test can be ensured and the test yields are increased. 26.56% test-yield improvement can be obtained.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89139320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Wohl, J. Waicukauski, Frederic Neuveux, Gregory A. Maston, Nadir Achouri, J. E. Colburn
{"title":"Two-level compression through selective reseeding","authors":"P. Wohl, J. Waicukauski, Frederic Neuveux, Gregory A. Maston, Nadir Achouri, J. E. Colburn","doi":"10.1109/TEST.2013.6651896","DOIUrl":"https://doi.org/10.1109/TEST.2013.6651896","url":null,"abstract":"As scan compression becomes ubiquitous, ever more complex designs require higher compression. This paper presents a novel, two-level compression system for scan input data generated by deterministic test generation. First, load care bits and X-control input data are encoded into PRPG seeds; next, seeds are selectively shared for further compression. The latter exploits the hierarchical nature of large designs with tens or hundreds of PRPGs. The system comprises a new architecture, which includes a simple instruction-decode unit, and new algorithms embedded into ATPG. Results on large industrial designs demonstrate significant data and cycle compression increases while maintaining test coverage and performance.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2013-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85578754","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A test probe for TSV using resonant inductive coupling","authors":"R. Rashidzadeh, I. Basith","doi":"10.1109/itc.2013.6861555","DOIUrl":"https://doi.org/10.1109/itc.2013.6861555","url":null,"abstract":"A contactless TSV probe based on the principle of resonant inductive coupling is presented in this work. The proposed scheme allows TSV data observation up to 2Gbps when the probe and TSV are 15μm apart.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2013-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72739394","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}