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2011 IEEE International Conference of Electron Devices and Solid-State Circuits最新文献

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Preparation of micro fluidic chip based on SU-8 mold 基于SU-8模具的微流控芯片的制备
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117676
Yuanqing Wu, Su-Ying Yao
{"title":"Preparation of micro fluidic chip based on SU-8 mold","authors":"Yuanqing Wu, Su-Ying Yao","doi":"10.1109/EDSSC.2011.6117676","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117676","url":null,"abstract":"As the silicon mold has rough edges, microchip is not conducive to fluid movement. In this paper, mold was produced by SU-8, and a set of production process was given. Then this paper made anti-stick layer on the mold, in order to improve mold re-use rate. Author discussed the impact of curing temperature and the ratio of PDMS and curing agent on the device, and does modification on casting PDMS, then seal to complete the microarray.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"27 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75445190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A novel dynamic element matching technique in current-steering DAC 一种新的电流转向DAC动态元件匹配技术
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117746
Wei Su, Y. Wang, Junlei Zhao, S. Jia, Xing Zhang
{"title":"A novel dynamic element matching technique in current-steering DAC","authors":"Wei Su, Y. Wang, Junlei Zhao, S. Jia, Xing Zhang","doi":"10.1109/EDSSC.2011.6117746","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117746","url":null,"abstract":"This paper presents a novel dynamic element matching (DEM) method called Thermo Data Weighted Average (TDWA) for Nyquist-rate current — steering digital to analog converter (DAC). When the input code changes, it only increase or decrease the number of unit current source which is be chosen. This approach can reach a better static performance than full random DEM technique but also eliminate signal dependent distortions to achieve good linearity at high sampling frequencies as other DEM implementations.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"35 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90867191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Noise analysis of the CG-CS low noise transconductance amplifier CG-CS低噪声跨导放大器的噪声分析
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117630
Jiangtao Xu, C. Saavedra, Guican Chen
{"title":"Noise analysis of the CG-CS low noise transconductance amplifier","authors":"Jiangtao Xu, C. Saavedra, Guican Chen","doi":"10.1109/EDSSC.2011.6117630","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117630","url":null,"abstract":"In this paper, noise analysis for a low noise transconductance amplifier (LNTA) is performed. LNTA becomes popular and necessary as the high linearity requirement and low supply voltage trend make the RF front-end design go into current domain. Common-gate common-source (CG-CS) topology is examined for noise analysis. Via theoretical analysis and specific equations derived, this paper not only studies how to arrange the topology and how to choose the design parameters, but also discusses the tradeoffs existing in LNTA design between noise figure, input matching and linearity.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"1 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90345357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A high-linearity fully-differential mixer 一个高线性全差分混频器
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117633
X. B. Li, M. Zhao, Z. H. Wu, B. Li
{"title":"A high-linearity fully-differential mixer","authors":"X. B. Li, M. Zhao, Z. H. Wu, B. Li","doi":"10.1109/EDSSC.2011.6117633","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117633","url":null,"abstract":"Mixer is an essential component for a communication system. Kinds of resolutions aiming at the improvement of mixer performance have been studied so far. In this paper, a fully differential structure is introduced and used in the design of a mixer with high linearity in a 0.18 µm CMOS RF process. Simulation results show that the input referred PldB (IPldB)of the mixer is 2.9 dBm, the input referred IP3 (IIP3) is 16 dBm and the power gain is 0.4 dB with a power consumption of 7.2 mW.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"73 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76676800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Effects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La2O3 gate dielectric 掺氟对La2O3栅极介质硅MOS电容器电性能的影响
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117657
L. Qian, X. Huang, P. Lai
{"title":"Effects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La2O3 gate dielectric","authors":"L. Qian, X. Huang, P. Lai","doi":"10.1109/EDSSC.2011.6117657","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117657","url":null,"abstract":"In this work, the effects of fluorine incorporation by using plasma on the electrical properties of Si MOS capacitor with La2O3 gate dielectric are investigated. From the capacitance-voltage (C-V) curve and gate leakage current, it is demonstrated that the F-plasma treatment can effectively suppress the growth of interfacial layer, and thus improve the electrical properties of the device in terms of accumulation capacitance, interface-state density and breakdown voltage.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"44 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76767318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
New upper bound of target array for reconfigurable VLSI arrays 可重构VLSI阵列目标阵列的新上界
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117702
W. Jigang, Xiaogang Han
{"title":"New upper bound of target array for reconfigurable VLSI arrays","authors":"W. Jigang, Xiaogang Han","doi":"10.1109/EDSSC.2011.6117702","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117702","url":null,"abstract":"Reconfiguring a VLSI array with faults is to construct a maximum logical sub-array (target array). A large target array implies a good harvest of the corresponding reconfiguration algorithm. Thus, a tight upper bound of the harvest can be directly used to evaluate the performance of the reconfiguration algorithm. This paper presents a new approach to calculate the upper bound of the harvest for the VLSI arrays with clustered faults. Simulation results show that the upper bound is reduced up to 20% on 256 × 256 array with clustered faults.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"34 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85423551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel flash memory cell and design optimization for high density and low power application 一种新颖的闪存单元和设计优化，用于高密度和低功耗应用
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117733
Huiwei Wu, Shiqiang Qin, Yimao Cai, Poren Tang, Zhan Zhan, Qianqian Huang, Ru Huang
{"title":"A novel flash memory cell and design optimization for high density and low power application","authors":"Huiwei Wu, Shiqiang Qin, Yimao Cai, Poren Tang, Zhan Zhan, Qianqian Huang, Ru Huang","doi":"10.1109/EDSSC.2011.6117733","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117733","url":null,"abstract":"A novel flash memory cell based on Tunneling Field Effect Transistor (TFET) is investigated via 2-D device simulation in this paper. The proposed flash memory cell shows improved program/erase speed, increased programming efficiency and super punch-through immunity as the cell gate length scaled from 180nm to 45nm, which indicates that this new structure is with strong scalability. Furthermore, cell design consideration i.e. ambipolar suppression for the TFET-based flash cell are also investigated and discussed.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"56 6 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85433680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Novel single-loop sigma-delta modulator with extended dynamic range 具有扩展动态范围的新型单环σ - δ调制器
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117738
Hongyi Li, Y. Wang, S. Jia, Xing Zhang
{"title":"Novel single-loop sigma-delta modulator with extended dynamic range","authors":"Hongyi Li, Y. Wang, S. Jia, Xing Zhang","doi":"10.1109/EDSSC.2011.6117738","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117738","url":null,"abstract":"Using an auxiliary quantizer before unity-STF SDM, a novel 3rd-order dual-quantizer SDM with extended dynamic range is presented. With hybrid distributed feedback & feedforward paths and an internal feedforward path, a novel low-distortion 3rd-order SDM with simple adder before quantizer is proposed as the unity-STF SDM. Simulations show their perfect immunity to non-idealities.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"1 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88612465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A curvature-compensation bandgap voltage reference with programmable trimming technique 具有可编程修整技术的曲率补偿带隙电压基准
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117744
Luncai Liu, Xiaozong Huang, Jing Zhang, Wengang Huang
{"title":"A curvature-compensation bandgap voltage reference with programmable trimming technique","authors":"Luncai Liu, Xiaozong Huang, Jing Zhang, Wengang Huang","doi":"10.1109/EDSSC.2011.6117744","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117744","url":null,"abstract":"A curvature-compensation bandgap voltage reference employing current proportional to absolute temperature (PTAT) is presented in this paper. In-package trim for the initial accuracy and temperature coefficient is used to get better performance without extra cost. And the principles and realization of the programmable electrical fuse are discussed in detail, which can be widely used. With the curvature compensation method, simulation temperature coefficient of 15ppm/°C over a wide range of •55°C to +125°C and high initial accuracy of better than 0.1% are achieved. Additionally, this bandgap reference has been embedded in a 16-bit ADC implementation.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"46 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87686080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 3.1–10.6 GHz ultra-wideband 0.18-µm CMOS low-noise amplifier with micromachined inductors 一种3.1-10.6 GHz超宽带0.18µm CMOS低噪声放大器，带有微机械电感
2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI: 10.1109/EDSSC.2011.6117619
To-Po Wang, Shih-Hua Chiang
{"title":"A 3.1–10.6 GHz ultra-wideband 0.18-µm CMOS low-noise amplifier with micromachined inductors","authors":"To-Po Wang, Shih-Hua Chiang","doi":"10.1109/EDSSC.2011.6117619","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117619","url":null,"abstract":"A 3.1–10.6 GHz ultra-wideband (UWB) 0.18-µm CMOS low-noise amplifier using micromachined inductors is proposed in this paper. This LNA consists of two stages, the first stage is the cascode topology with shunt-series feedback for bandwidth enhancement, and the second stage is the common-source topology with shunt-series feedback for further bandwidth extended. To improve LNA performance in terms of gain and NF, the CMOS compatible micromachined inductors are adopted in this work. By using these techniques, this LNA achieves the 3-dB bandwidth from 3.1–10.6 GHz, and the peak gain is 19 dB. The dc power consumption and lowest noise figure of this LNA is 14.3 mW and 2.4 dB, respectively.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"65 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83537996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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