IEEE Transactions on Advanced Packaging最新文献

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Sn Bumping Without Photoresist Mould and Si Dice Stacking for 3-D Packaging 无光刻胶模具的锡碰撞和三维包装的硅片堆积
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-24 DOI: 10.1109/TADVP.2010.2049019
Sung-Jun Hong, Ji Heon Jun, J. Jung, M. Mayer, Yujie Zhou
{"title":"Sn Bumping Without Photoresist Mould and Si Dice Stacking for 3-D Packaging","authors":"Sung-Jun Hong, Ji Heon Jun, J. Jung, M. Mayer, Yujie Zhou","doi":"10.1109/TADVP.2010.2049019","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049019","url":null,"abstract":"Chip stacking with through-silicon-vias (TSV) technology for 3-D packaging of electronic devices was investigated. A new process of direct solder bumping on Si wafers without photoresist (PR) mould was designed and applied in this study. The Cu extrusion process on the via was also omitted for process simplification. This simplified process can be useful for cost reduction and increased productivity. The substrate for the experiments was a p-type 〈100 〉 Si wafer of 100 mm diameter. In order to produce the vias, the Si wafer was etched by a deep reactive ion etcher (DRIE) using SF6 and C4F8 plasmas alternately. The produced vias were 40 μm in diameter and 80 μm in depth. On the via side walls, SiO2, Ti, and Au layers were formed with thicknesses of 1, 0.1, and 0.7μm, respectively. Pulsed direct current (DC) electroplating was used to fill the vias with Cu. Then the Si wafer was back ground to a thickness of 80 μm until the Cu filling in the vias was exposed to the surface without extrusion. Plating current subsequently flowed through the vias to the bumping surface, and Sn was electroplated on the Cu filling directly without a PR mould. To optimize the bumping process, the current density and time for Sn plating were varied from 0.04 to 0.06 A/cm2 and from 10 to 40 min, respectively. Bumps with a height of 20 μm were formed successfully with 0.05 A/cm2 and 30 min without a PR mould. The bump height increased with increasing plating current and time; for example, from 13 μm at 10 min to 33 μm at 40 min in case of 0.06 A/cm2. The Si dice with electroplated Sn bumps had dimensions of 5 × 5 mm and thickness of 80 μm. Three Si dice were stacked successfully by micro-soldering at 260°C. In the interface between the Sn bumps and the Cu filling, a Cu6Sn5 intermetallic compound was produced with a thickness of 3.2 μm. Through this study, a process for non-PR solder bumping by electroplating and wafer stacking with TSV was achieved successfully.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"912-917"},"PeriodicalIF":0.0,"publicationDate":"2010-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049019","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Electronic Packaging Materials for Extreme, Low Temperature, Fatigue Environments 用于极端、低温、疲劳环境的电子封装材料
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-03 DOI: 10.1109/TADVP.2010.2044504
A. Shapiro, C. Tudryn, D. Schatzel, S. Tseng
{"title":"Electronic Packaging Materials for Extreme, Low Temperature, Fatigue Environments","authors":"A. Shapiro, C. Tudryn, D. Schatzel, S. Tseng","doi":"10.1109/TADVP.2010.2044504","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2044504","url":null,"abstract":"Electronic packaging technology has been developed to withstand extreme temperature fatigue conditions from - 120°C to + 85°C for over 1500 cycles. This temperature regime and number of thermal cycles exceeds typical military standard (MIL-STD) testing from - 55°C to + 125°C and approximately 100 cycles. Chip-on-board (COB) packaging was selected since it reduces mass (up to 98% savings) and increases functionality on a smaller surface area (as low as 40%) compared to standard surface mount packaging technology (SMT). Material combinations of different encapsulants, die attaches, and substrates for bare silicon die with 1 mil Au wire bonds were designed and continuously monitored in situ during thermal cycling. This paper will describe experimental and modeling results of surviving material combinations and key failures that occurred at various temperatures and cycle counts.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"408-420"},"PeriodicalIF":0.0,"publicationDate":"2010-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2044504","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Probabilistic Design Approach for Cyclic Fatigue Life Prediction of Microelectronic Interconnects 微电子互连循环疲劳寿命预测的概率设计方法
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-03 DOI: 10.1109/TADVP.2010.2040734
L. Ladani, J. Razmi
{"title":"Probabilistic Design Approach for Cyclic Fatigue Life Prediction of Microelectronic Interconnects","authors":"L. Ladani, J. Razmi","doi":"10.1109/TADVP.2010.2040734","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2040734","url":null,"abstract":"Deterministic approaches may predict the life of solder joint interconnects used in microelectronic devices far different from the test results and field environment. This difference is caused by uncertainties introduced in finite element and damage modeling with different random variables such as material properties, geometry, damage model constants, and many others. This paper presents a methodology to include these uncertainties in the life prediction approach for solder joint materials. The approach is implemented in predicting the life of ball grid array Pb-free solder joints under thermo-mechanical cyclic loading using the energy partitioning (E-P) damage model. The sensitivity of the finite element results to uncertainties in elastic and inelastic material properties are investigated using this probabilistic approach. In addition final life prediction sensitivity to uncertainties in damage model constants are studied and compared with the effect of uncertainties in material properties. The analyses show that from material properties, creep coefficient and activation energy are two factors that have significant effect in fluctuating the prediction results. Coefficient of thermal expansion was also found to have a strong effect. When compared with the damage model constants, material properties are found to have a negligible effect suggesting a more cautious use of the damage models and constants. Damage model exponents show a more significant effect than damage model coefficients.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"559-568"},"PeriodicalIF":0.0,"publicationDate":"2010-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2040734","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62396777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Well-Conditioned Integral-Equation Formulation for Efficient Transient Analysis of Electrically Small Microelectronic Devices 小型微电子器件瞬态分析的良好条件积分方程
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-03 DOI: 10.1109/TADVP.2009.2033569
H. Bağcı, F. Andriulli, F. Vipiana, G. Vecchi, E. Michielssen
{"title":"A Well-Conditioned Integral-Equation Formulation for Efficient Transient Analysis of Electrically Small Microelectronic Devices","authors":"H. Bağcı, F. Andriulli, F. Vipiana, G. Vecchi, E. Michielssen","doi":"10.1109/TADVP.2009.2033569","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033569","url":null,"abstract":"A hierarchically regularized coupled set of time-domain surface and volume electric field integral-equations (TD-S-EFIE and TD-V-EFIE) for analyzing electromagnetic wave interactions with electrically small and geometrically intricate composite structures comprising perfect electrically conducting surfaces and finite dielectric volumes is presented. A classically formulated coupled set of TD-S- and V-EFIEs is shown to be ill-conditioned at low frequencies owing to the hypersingular nature of the TD-S-EFIE. To eliminate low-frequency breakdown in marching-on-in-time solvers for these coupled equations, a hierarchical regularizer leveraging generalized Rao-Wilton-Glisson functions is applied to the TD-S-EFIE; no regularization is applied to the TD-V-EFIE as it is protected from low-frequency breakdown by an identity term. The resulting hierarchically regularized hybrid TD-S- and V-EFIE solver is applicable to the analysis of wave interactions with electrically small and densely meshed structures of arbitrary topology. The accuracy, efficiency, and applicability of the proposed solver are demonstrated by analyzing crosstalk in a six-port transmission line, radiation from a miniature radio-frequency identification antenna, and, plane-wave coupling onto a partially-shielded and fully loaded two-layer computer board.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"468-480"},"PeriodicalIF":0.0,"publicationDate":"2010-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033569","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Electrical Modeling and Design of a Wafer-Level Package for MEM Resonators memm谐振器晶圆级封装的电建模与设计
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-03 DOI: 10.1109/TADVP.2010.2043101
J. Perruisseau-Carrier, M. Mazza, A. Jourdain, A. Skrivervik, A. Ionescu, H. Tilmans
{"title":"Electrical Modeling and Design of a Wafer-Level Package for MEM Resonators","authors":"J. Perruisseau-Carrier, M. Mazza, A. Jourdain, A. Skrivervik, A. Ionescu, H. Tilmans","doi":"10.1109/TADVP.2010.2043101","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2043101","url":null,"abstract":"This paper presents the electrical design and characterization of a wafer-level, or 0-level, package for micro-electromechanical resonators. We start by identifying the requirements on the electrical parasitics of a packaged resonator, derived from an analysis of the oscillator circuit comprising the resonator. Then, using the deduced requirements as a starting point, an optimized design of the package is developed in a two-step procedure. First, initial choices for the package topology are made on the basis of intuitive and physical circuit models. Second, a more detailed analysis is carried out by means of full-wave simulations and circuit models extractions. Measured results on empty packages are presented, validating both circuit models and full-wave simulation results. Finally, the parasitics values obtained are discussed in the light of the implementation of an oscillator circuit, demonstrating the possibility to implement functioning oscillators based on the proposed package.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"104 1","pages":"534-542"},"PeriodicalIF":0.0,"publicationDate":"2010-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2043101","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62396912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Distribution and Diffusion of Water in Model Epoxy Molding Compound: Molecular Dynamics Simulation Approach 水在模型环氧树脂中的分布和扩散:分子动力学模拟方法
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-01 DOI: 10.1109/TADVP.2009.2033570
Seung Geol Lee, S. Jang, Jongman Kim, Gene S Kim
{"title":"Distribution and Diffusion of Water in Model Epoxy Molding Compound: Molecular Dynamics Simulation Approach","authors":"Seung Geol Lee, S. Jang, Jongman Kim, Gene S Kim","doi":"10.1109/TADVP.2009.2033570","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033570","url":null,"abstract":"The distribution and diffusion of water with various water content in a fully crosslinked epoxy molding compound was simulated using a parallel full-atomistic molecular dynamics simulation method. We found that the free volume is 5.1%, 4.4%, and 4.0% of the total system volume at 0 wt%, 4 wt%, and 7 wt% of water content, respectively, accommodating the absorbed water molecules, where the molecules are distributed throughout the system. The hydrophilic groups of the epoxy molding compound (such as tertiary amine groups and hydroxyl groups) are uniformly distributed through the system: the average distance between the amine groups is ~9.5 ¿ and that between the hydroxyl groups is 3.8-7.2 ¿. The water molecules are distributed in proximity to these hydrophilic groups. By counting the number of these water molecules nearby the functional groups, we found that on average, each amine group has 2.47 and 3.86 water molecules, and each hydroxyl group has 0.61 and 0.85 water molecules at 4 wt% and 7 wt% water content, respectively. The water diffusion proceeds via the hopping mechanism and is enhanced with increasing water content: 0.1690 × 10-6 cm 2/s for 4 wt% water content and 0.2065 × 10-6 cm2/s for 7 wt% water content.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"333-339"},"PeriodicalIF":0.0,"publicationDate":"2010-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033570","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Finite-Difference Analysis of Interconnects With Frequency-Dependent Parameters Based on Equivalent Circuit Models 基于等效电路模型的频率相关参数互连的有限差分分析
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-01 DOI: 10.1109/TADVP.2009.2033200
M. Tang, Junfa Mao
{"title":"Finite-Difference Analysis of Interconnects With Frequency-Dependent Parameters Based on Equivalent Circuit Models","authors":"M. Tang, Junfa Mao","doi":"10.1109/TADVP.2009.2033200","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033200","url":null,"abstract":"A new method for finite-difference analysis of high-speed interconnects with frequency-dependent parameters is presented. A set of differential equations are derived based on the equivalent circuit models of dispersive transmission lines. The finite-difference time-domain (FDTD) method is then employed to solve them involving no convolution computations. The proposed method has the identical memory requirement and computational expense as the recursive-convolution-based algorithm, while more accurate results are obtained. The generalized two-port equivalent model of transmission lines contributes to the convenience of dealing with arbitrary termination networks. In addition, a higher order (2,4) FDTD scheme is employed to improve the accuracy and efficiency of this algorithm. The validity and accuracy of the proposed method are illustrated by several numerical examples.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"457-467"},"PeriodicalIF":0.0,"publicationDate":"2010-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033200","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Correction to "Laser-Assisted Sealing and Testing for Ceramic Packaging of MEMS Devices" [Aug 03 283-288] 对“MEMS器件陶瓷封装激光辅助密封与测试”的修正[03年8月283-288]
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-01 DOI: 10.1109/TADVP.2010.2049287
Yi Tao, A. Malshe, W. Brown, D. Dereus, S. Cunningham
{"title":"Correction to \"Laser-Assisted Sealing and Testing for Ceramic Packaging of MEMS Devices\" [Aug 03 283-288]","authors":"Yi Tao, A. Malshe, W. Brown, D. Dereus, S. Cunningham","doi":"10.1109/TADVP.2010.2049287","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049287","url":null,"abstract":"In the above titled paper (ibid., vol. 26, no. 3, pp. 283-288, Aug. 03), the biography of Ajay P. Malshe should have appeared as it is presented here.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"569-569"},"PeriodicalIF":0.0,"publicationDate":"2010-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049287","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On Simplified Fast Modal Analysis for Through Silicon Vias in Layered Media Based Upon Full-Wave Solutions 基于全波解的层状介质中硅通孔简化快速模态分析
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-01 DOI: 10.1109/TADVP.2009.2033034
Zhonghai Guo, G. Pan
{"title":"On Simplified Fast Modal Analysis for Through Silicon Vias in Layered Media Based Upon Full-Wave Solutions","authors":"Zhonghai Guo, G. Pan","doi":"10.1109/TADVP.2009.2033034","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033034","url":null,"abstract":"Based on equivalent magnetic frill array model and Galerkin's procedure, we present a simplified full-wave algorithm to characterize the propagation behavior and signal integrity of massive number of through silicon vias (TSV) for the 3-D system-in-package (SIP) and system-on-chip (SOC) applications. The proposed method employs the Fourier transform and takes advantage of circular cylindrical shapes with Bessel's functions and the addition theorem to solve the Helmholtz equations without resorting numerical discretization. As a result, it provides closed form solutions with high precision. Since the algorithm does not rely on numerically generated meshes, it gains one to two orders of magnitude in speed, compared to popular commercial software packages. Numerical examples demonstrate that the new method provides good agreement with the HFSS results. As the number of vias increases the new method gains more in both speed and accuracy.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"517-523"},"PeriodicalIF":0.0,"publicationDate":"2010-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033034","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces 用于并行高速DRAM接口的零远端串扰蛇形微带线
IEEE Transactions on Advanced Packaging Pub Date : 2010-05-01 DOI: 10.1109/TADVP.2009.2033938
Kyoungho Lee, Hae-Kang Jung, Hyung-Joon Chi, Hye-Jung Kwon, J. Sim, Hong-June Park
{"title":"Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM Interfaces","authors":"Kyoungho Lee, Hae-Kang Jung, Hyung-Joon Chi, Hye-Jung Kwon, J. Sim, Hong-June Park","doi":"10.1109/TADVP.2009.2033938","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033938","url":null,"abstract":"Serpentine microstrip lines are proposed to eliminate the far-end crosstalk in parallel high-speed interfaces by increasing the capacitive coupling ratio to equal the inductive coupling ratio. Zero far-end crosstalk voltage waveform and zero crosstalk-induced jitter (CIJ) were achieved on an FR4 printed circuit board, by adjusting the unit section length of the serpentine structure. Application of the proposed serpentine microstrip lines to the 2-drop stub series terminated logic DRAM channel increased the maximum data rate from 0.9 to 1.4 Gb/s and reduced CIJ by ~ 78 ps at 3.3 Gb/s.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"552-558"},"PeriodicalIF":0.0,"publicationDate":"2010-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033938","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
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