Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences最新文献_第2页

Efficient Realization of an SC Circuit with Feedback and Its Applications 带反馈的SC电路的高效实现及其应用

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023eap1019

Yuto ARIMURA, Shigeru YAMASHITA

引用次数: 0

Joint CFO and DOA Estimation Based on MVDR Criterion in Interleaved OFDMA/SDMA Uplink 基于MVDR准则的OFDMA/SDMA交织上行联合CFO和DOA估计

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023eal2064

Chih-Chang SHEN, Wei JHANG

引用次数: 0

Operational Resilience of Network Considering Common-cause Failures 考虑共因故障的网络运行弹性

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023eap1011

Tetsushi YUGE, Yasumasa SAGAWA, Natsumi TAKAHASHI

引用次数: 0

Efficient Homomorphic Evaluation of Arbitrary Uni/Bivariate Integer Functions and Their Applications 任意单/二元整数函数的有效同态求值及其应用

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023cip0010

Daisuke MAEDA, Koki MORIMURA, Shintaro NARISADA, Kazuhide FUKUSHIMA, Takashi NISHIDE

{"title":"Efficient Homomorphic Evaluation of Arbitrary Uni/Bivariate Integer Functions and Their Applications","authors":"Daisuke MAEDA, Koki MORIMURA, Shintaro NARISADA, Kazuhide FUKUSHIMA, Takashi NISHIDE","doi":"10.1587/transfun.2023cip0010","DOIUrl":"https://doi.org/10.1587/transfun.2023cip0010","url":null,"abstract":"We propose how to homomorphically evaluate arbitrary univariate and bivariate integer functions such as division. A prior work proposed by Okada et al. (WISTP'18) uses polynomial evaluations such that the scheme is still compatible with the SIMD operations in BFV and BGV schemes, and is implemented with the input domain 𝕫257. However, the scheme of Okada et al. requires the quadratic numbers of plaintext-ciphertext multiplications and ciphertext-ciphertext additions in the input domain size, and although these operations are more lightweight than the ciphertext-ciphertext multiplication, the quadratic complexity makes handling larger inputs quite inefficient. In this work, first we improve the prior work and also propose a new approach that exploits the packing method to handle the larger input domain size instead of enabling the SIMD operation, thus making it possible to work with the larger input domain size, e.g., 𝕫215 in a reasonably efficient way. In addition, we show how to slightly extend the input domain size to 𝕫216 with a relatively moderate overhead. Further we show another approach to handling the larger input domain size by using two ciphertexts to encrypt one integer plaintext and applying our techniques for uni/bivariate function evaluation. We implement the prior work of Okada et al., our improved version of Okada et al., and our new scheme in PALISADE with the input domain 𝕫215, and confirm that the estimated run-times of the prior work and our improved version of the prior work are still about 117 days and 59 days respectively while our new scheme can be computed in 307 seconds.","PeriodicalId":55003,"journal":{"name":"Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135402669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A New Pairing-based Two-round Tightly-secure Multi-signature scheme with Key Aggregation 一种新的基于配对的密钥聚合两轮严密安全多重签名方案

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023cip0022

Rikuhiro KOJIMA, Jacob C. N. SCHULDT, Goichiro HANAOKA

{"title":"A New Pairing-based Two-round Tightly-secure Multi-signature scheme with Key Aggregation","authors":"Rikuhiro KOJIMA, Jacob C. N. SCHULDT, Goichiro HANAOKA","doi":"10.1587/transfun.2023cip0022","DOIUrl":"https://doi.org/10.1587/transfun.2023cip0022","url":null,"abstract":"Multi-signatures have seen renewed interest due to their application to blockchains, e.g., BIP 340 (one of the Bitcoin improvement proposals), which has triggered the proposals of several new schemes with improved efficiency. However, many previous works have a “loose” security reduction (a large gap between the difficulty of the security assumption and breaking the scheme) or depend on strong idealized assumptions such as the algebraic group model (AGM). This makes the achieved level of security uncertain when instantiated in groups typically used in practice, and it becomes unclear for developers how secure a given scheme is for a given choice of security parameters. Thus, this leads to the question “what kind of schemes can we construct that achieves tight security based on standard assumptions?”. In this paper, we show a simple two-round tightly-secure pairing-based multi-signature scheme based on the computation Diffie-Hellman problem in the random oracle model. This proposal is the first two-round multi-signature scheme that achieves tight security based on a computational assumption and supports key aggregation. Furthermore, our scheme reduce the signature bit size by 19% compared with the shortest existing tightly-secure DDH-based multi-signature scheme. Moreover, we implemented our scheme in C++ and confirmed that it is efficient in practice; to complete the verification takes less than 1 [ms] with a total (computational) signing time of 13 [ms] for under 100 signers. The source code of the implementation is published as OSS.","PeriodicalId":55003,"journal":{"name":"Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135549466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO 基于多栅极可重构单元的掩模后功能ECO技术重映射方法

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023vlp0015

Tomohiro NISHIGUCHI, Nobutaka KUROKI, Masahiro NUMA

{"title":"Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO","authors":"Tomohiro NISHIGUCHI, Nobutaka KUROKI, Masahiro NUMA","doi":"10.1587/transfun.2023vlp0015","DOIUrl":"https://doi.org/10.1587/transfun.2023vlp0015","url":null,"abstract":"This paper proposes multi-gate reconfigurable (RECON) cells and a technology remapping approach using them as spare cells for post-mask functional engineering change orders (ECOs). With the rapid increase in circuit complexity, ECOs often occur in the post-mask stage of LSI designs. To deal with post-mask ECOs at a low cost, only the metal layers are redesigned by making functional changes using spare cells. For this purpose, 2T/4T/6T-RECON cells were proposed as reconfigurable spare cells. However, conventional RECON cells are used to implement single functions, which may result in unused transistors in the cells. In addition, the number of 2T/4T/6T-RECON spare cells used for post-mask ECOs varies greatly depending on the circuit to be implemented and the type of ECO that occurs. Therefore, functional ECOs may fail due to a lack of certain types of RECON cells, even if other types of RECON cells remain. To solve this problem, we propose multi-gate RECON cells that implement multiple functions in a single RECON cell while retaining the layouts of conventional 4T/6T-RECON base cells, and a technology remapping approach using them. The proposed approach not only reduces the number of used spare cells for modifications but also allows the flexible use of spare cells to fix them with less increase in wire length and delay. Experimental results have confirmed that the functional ECO success ratio is increased by 4.8 pt on average and the total number of used spare cells is reduced by 5.6% on average. It has also been confirmed that the increase in wire length is reduced by 17.4% on average and the decrease in slack is suppressed by 21.6% on average.","PeriodicalId":55003,"journal":{"name":"Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136053103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Efficient Wafer-level Spatial Variation Modeling for Multi-site RF IC Testing 多站点射频集成电路测试的高效晶圆级空间变化建模

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023eap1115

Riaz-ul-haque MIAN, Tomoki NAKAMURA, Masuo KAJIYAMA, Makoto EIKI, Michihiro SHINTANI

{"title":"Efficient Wafer-level Spatial Variation Modeling for Multi-site RF IC Testing","authors":"Riaz-ul-haque MIAN, Tomoki NAKAMURA, Masuo KAJIYAMA, Makoto EIKI, Michihiro SHINTANI","doi":"10.1587/transfun.2023eap1115","DOIUrl":"https://doi.org/10.1587/transfun.2023eap1115","url":null,"abstract":"Wafer-level performance prediction techniques have been increasingly gaining attention in production LSI testing due to their ability to reduce measurement costs without compromising test quality. Despite the availability of several efficient methods, the site-to-site variation commonly observed in multi-site testing for radio frequency circuits remains inadequately addressed. In this manuscript, we propose a wafer-level performance prediction approach for multi-site testing that takes into account the site-to-site variation. Our proposed method is built on the Gaussian process, a widely utilized wafer-level spatial correlation modeling technique, and enhances prediction accuracy by extending hierarchical modeling to leverage the test site information test engineers provide. Additionally, we propose a test-site sampling method that maximizes cost reduction while maintaining sufficient estimation accuracy. Our experimental results, which employ industrial production test data, demonstrate that our proposed method can decrease the estimation error to 1/19 of that a conventional method achieves. Furthermore, our sampling method can reduce the required measurements by 97% while ensuring satisfactory estimation accuracy.","PeriodicalId":55003,"journal":{"name":"Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135710480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Noise-Robust Scream Detection using Wave-U-Net 基于Wave-U-Net的噪声鲁棒尖叫检测

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023ssl0001

Noboru HAYASAKA, Riku KASAI, Takuya FUTAGAMI

引用次数: 0

Consensus-Based Distributed Exp3 Policy Over Directed Time-Varying Networks 有向时变网络上基于共识的分布式Exp3策略

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023map0008

Tomoki NAKAMURA, Naoki HAYASHI, Masahiro INUIGUCHI

引用次数: 0

Power Analysis of Floating-Point Operations for Leakage Resistance Evaluation of Neural Network Model Parameters 用于神经网络模型参数抗漏电性评估的浮点运算功率分析

4区计算机科学

Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences Pub Date : 2023-01-01 DOI: 10.1587/transfun.2023cip0012

Hanae NOZAKI, Kazukuni KOBARA

引用次数: 0