Journal of Systems Architecture最新文献_第7页

EDF-VD-based energy efficient scheduling for imprecise mixed-criticality task with resource synchronization 基于edf - vd的不精确混合临界任务资源同步节能调度

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-04-01 Epub Date: 2026-01-27 DOI: 10.1016/j.sysarc.2026.103725

Yi-Wen Zhang, Quan-Huang Zhang

引用次数: 0

VM-PHRs: Efficient and verifiable multi-delegated PHRs search scheme for cloud–edge collaborative services vm - phr：针对云边缘协同服务的高效且可验证的多委托phr搜索方案

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2026-01-05 DOI: 10.1016/j.sysarc.2026.103689

Shiwen Zhang , Wenrui Zhu , Wei Liang , Arthur Sandor Voundi Koe , Neal N. Xiong

{"title":"VM-PHRs: Efficient and verifiable multi-delegated PHRs search scheme for cloud–edge collaborative services","authors":"Shiwen Zhang , Wenrui Zhu , Wei Liang , Arthur Sandor Voundi Koe , Neal N. Xiong","doi":"10.1016/j.sysarc.2026.103689","DOIUrl":"10.1016/j.sysarc.2026.103689","url":null,"abstract":"<div><div>With the proliferation of smart healthcare services, many hospitals delegate PHRs processing to cloud-based resources. Despite its effectiveness for bounded search and selective record sharing over encrypted data, key-aggregate searchable encryption still suffers from significant drawbacks in current constructions. First, the existing trapdoor matching algorithms fail to achieve accurate matching and exhibit poor robustness against guessing attacks. Second, current works lack efficient mechanisms to enable fine-grained verification of search results. Third, there is currently no efficient mechanism to delegate user privileges. In this paper, we design an efficient and verifiable multi-delegated PHRs search scheme for cloud–edge collaborative services (VM-PHRs). To enable exact trapdoor matching and resist guessing attacks, we develop a new algorithm, EDAsearch. To achieve fine-grained verification of data integrity and correctness, we design a novel distributed protocol that operates over a network of edge servers. To accommodate real-world emergency scenarios, we develop a novel threshold mechanism that supports privilege delegation based on user attributes and hash commitments. Extensive security analysis and performance evaluation of VM-PHRs demonstrate that it is scalable, secure, and practical.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103689"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145927094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Accelerating language giants: A survey of optimization strategies for LLM inference on hardware platforms 加速语言巨头：硬件平台上LLM推理优化策略的调查

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2026-01-03 DOI: 10.1016/j.sysarc.2026.103690

Young Chan Kim , Seok Kyu Yoon , Sung Soo Han, Chae Won Park, Jun Oh Park, Jun Ha Ko, Hyun Kim

{"title":"Accelerating language giants: A survey of optimization strategies for LLM inference on hardware platforms","authors":"Young Chan Kim , Seok Kyu Yoon , Sung Soo Han, Chae Won Park, Jun Oh Park, Jun Ha Ko, Hyun Kim","doi":"10.1016/j.sysarc.2026.103690","DOIUrl":"10.1016/j.sysarc.2026.103690","url":null,"abstract":"<div><div>With the emergence of transformer-based models that have demonstrated remarkable performance in natural language processing tasks, large language models (LLMs) built upon the transformer architecture and trained on massive datasets have achieved outstanding results in various tasks such as translation and summarization. Among these, decoder-only LLMs have garnered significant attention due to their superior few-shot and zero-shot capabilities compared to other architectures. Motivated by their exceptional performance, numerous efforts have been made to deploy decoder-only LLMs on diverse hardware platforms. However, the substantial computational and memory demands during both training and inference pose considerable challenges for resource-constrained hardware. Although efficient architectural designs have been proposed to address these issues, LLM inference continues to require excessive computational and memory resources. Consequently, extensive research has been conducted to compress model components and enhance inference efficiency across different hardware platforms. To further accelerate the inherently repetitive computations of LLMs, a variety of approaches have been introduced, integrating operator-level optimizations within Transformer blocks and system-level optimizations at the granularity of repeated Transformer block execution. This paper surveys recent research on decoder-only LLM inference acceleration, categorizing existing approaches based on optimization levels specific to each hardware platform. Building on this classification, we provide a comprehensive analysis of prior decoder-only LLM acceleration techniques from multiple perspectives.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103690"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145927172","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Thwarting gradient inversion in federated learning via generative shadow mapping defense 通过生成阴影映射防御阻止联邦学习中的梯度反转

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2025-12-22 DOI: 10.1016/j.sysarc.2025.103671

Hui Zhou , Yuling Chen , Zheng Qin , Xin Deng , Ziyu Peng

{"title":"Thwarting gradient inversion in federated learning via generative shadow mapping defense","authors":"Hui Zhou , Yuling Chen , Zheng Qin , Xin Deng , Ziyu Peng","doi":"10.1016/j.sysarc.2025.103671","DOIUrl":"10.1016/j.sysarc.2025.103671","url":null,"abstract":"<div><div>Federated learning (FL) has garnered significant attention in the Artificial Intelligence of Things (AIoT) domain. It enables collaborative learning across distributed, privacy-sensitive devices without compromising their local data. However, existing research indicates that adversaries can still reconstruct the raw data by the observed gradient, resulting in a privacy breach. To further strengthen privacy in FL, various defense measures have been proposed, ranging from encryption-based and perturbation-based methods to advanced adaptive strategies. However, nearly all such defenses are applied directly to raw data or gradients, where the private information inherently resides. This intrinsic presence of sensitive data inevitably leaves FL vulnerable to privacy leakage. Thus, a new defense that can <em>“erase”</em> private information is urgently needed. In this paper, we propose <em>Shade</em>, a shadow mapping defense framework against gradient inversion attack using generative models in FL. We implement two instances of manifold defense methods based on a generative adversarial networks and diffusion models, <em>ShadeGAN</em> and <em>ShadeDiff</em>. In particular, we first generate alternative shadow data to involve in model training. Subsequently, we construct surrogate model to replace the raw model, eliminating the memory of the raw model. Finally, an optional gradient protection mechanism is provided, which operates by mapping raw gradients to their shadow counterparts. Extensive experiment demonstrates that our scheme can prevent adversaries from reconstructing raw data, effectively reducing the risk of FL privacy disclosure.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103671"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145841939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

DeSpa: Heterogeneous multi-core accelerators for energy-efficient dense and sparse computation at the tile level in Deep Neural Networks 基于异构多核加速器的深度神经网络层级高效密集稀疏计算

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2025-12-12 DOI: 10.1016/j.sysarc.2025.103650

Hyungjun Jang , Dongho Ha , Hyunwuk Lee , Won Woo Ro

{"title":"DeSpa: Heterogeneous multi-core accelerators for energy-efficient dense and sparse computation at the tile level in Deep Neural Networks","authors":"Hyungjun Jang , Dongho Ha , Hyunwuk Lee , Won Woo Ro","doi":"10.1016/j.sysarc.2025.103650","DOIUrl":"10.1016/j.sysarc.2025.103650","url":null,"abstract":"<div><div>The rapid evolution of Deep Neural Networks (DNNs) has driven significant advances in Domain-Specific Accelerators (DSAs). However, efficiently exploiting DSAs across diverse workloads remains challenging because complementary techniques—from sparsity-aware computation to system-level innovations such as multi-core architectures—have progressed independently. Our analysis reveals pronounced tile-level sparsity variations within the DNNs, which cause efficiency fluctuations on homogeneous accelerators built solely from dense or sparsity-oriented cores. To address this challenge, we present DeSpa, a novel heterogeneous multi-core accelerator architecture that integrates both dense and sparse cores to dynamically adapt to tile-level sparsity variations. DeSpa is paired with a heterogeneity-aware scheduler that employs a tile-stealing mechanism to maximize core utilization and minimize idle time. Compared to a homogeneous sparse multi-core baseline, DeSpa reduces energy consumption by 33% and improves energy-delay product (EDP) by 14%, albeit at the cost of a 35% latency increase. Relative to a homogeneous dense baseline, it reduces EDP by 44%, cuts energy consumption by 42%, and delivers a <span><math><mrow><mn>1</mn><mo>.</mo><mn>34</mn><mo>×</mo></mrow></math></span> speed-up.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103650"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145792174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An efficient privacy-preserving transformer inference scheme for cloud-based intelligent decision-making in AIoT 基于云的AIoT智能决策中一种高效的保隐私变压器推理方案

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2026-01-02 DOI: 10.1016/j.sysarc.2026.103687

Mingshun Luo , Haolei He , Wenti Yang , Shuai Yuan , Zhitao Guan

{"title":"An efficient privacy-preserving transformer inference scheme for cloud-based intelligent decision-making in AIoT","authors":"Mingshun Luo , Haolei He , Wenti Yang , Shuai Yuan , Zhitao Guan","doi":"10.1016/j.sysarc.2026.103687","DOIUrl":"10.1016/j.sysarc.2026.103687","url":null,"abstract":"<div><div>The Artificial Intelligence of Things (AIoT) is transforming modern society by combining the data-collection capabilities of IoT devices with the inference power of cloud-based large language models (LLMs). However, transmitting sensitive data to the cloud for intelligent decision-making raises significant privacy concerns. Cryptographic techniques such as homomorphic encryption (HE) and secure multi-party computation (MPC) provide promising solutions for privacy-preserving inference. However, existing schemes primarily target small-scale models and are inefficient when applied to Transformer-based LLMs, which involve large-scale matrix multiplications and complex non-linear functions, and deep model architectures. To address these challenges, we propose an efficient privacy-preserving Transformer inference scheme for cloud-based AIoT scenarios. Our framework integrates HE and MPC to ensure data confidentiality while minimizing computational and communication overhead. We design a fast HE-based matrix multiplication protocol using an offline-online collaborative pipeline and single instruction multiple data (SIMD)-based packing rules. Furthermore, we develop an accurate and efficient MPC-based non-linear function evaluation protocol using optimized piecewise polynomial approximation and integer-fraction decomposition. Experimental results show that our approach achieves 8.3<span><math><mo>×</mo></math></span>–91.6<span><math><mo>×</mo></math></span> faster in matrix multiplication, 1.4<span><math><mo>×</mo></math></span>–19<span><math><mo>×</mo></math></span> faster in non-linear function evaluation, and 3.5<span><math><mo>×</mo></math></span>–137.9<span><math><mo>×</mo></math></span> reduction in communication overhead with the LAN network, while maintaining lossless accuracy, thus enabling secure and scalable intelligent decision-making in AIoT environments.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103687"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145927095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

ARAS: Adaptive low-cost ReRAM-based accelerator for DNNs ARAS：用于深度神经网络的自适应低成本rram加速器

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2025-12-20 DOI: 10.1016/j.sysarc.2025.103668

Mohammad Sabri, Marc Riera, Antonio González

{"title":"ARAS: Adaptive low-cost ReRAM-based accelerator for DNNs","authors":"Mohammad Sabri, Marc Riera, Antonio González","doi":"10.1016/j.sysarc.2025.103668","DOIUrl":"10.1016/j.sysarc.2025.103668","url":null,"abstract":"<div><div>Processing Using Memory (PUM) accelerators have the potential to perform Deep Neural Network (DNN) inference by using arrays of memory cells as computation engines. Among various memory technologies, ReRAM crossbars show promising performance in computing dot-product operations in the analog domain. Nevertheless, the expensive writing procedure of ReRAM cells has led researchers to design accelerators whose crossbars have enough capacity to store the full DNN. Given the tremendous and continuous increase in DNN model sizes, this approach is unfeasible for some networks, or inefficient due to the huge hardware requirements. Those accelerators lack the flexibility to adapt to any given DNN model, facing an <em>adaptability</em> challenge.</div><div>To address this issue we introduce ARAS, a cost-effective ReRAM-based accelerator that employs an offline scheduler to adapt different DNNs to the resource-limited hardware. ARAS also overlaps the computation of a layer with the weight writing of several layers to mitigate the high writing latency of ReRAM. Furthermore, ARAS introduces three optimizations aimed at reducing the energy overheads of writing in ReRAM. Our key optimization capitalizes on the observation that DNN weights can be re-encoded to augment their similarity between layers, increasing the amount of bitwise values that are equal or similar when overwriting ReRAM cells and, hence, reducing the amount of energy required to update the cells. Overall, ARAS greatly reduces the ReRAM writing activity. We evaluate ARAS on a popular set of DNNs. ARAS provides up to <span><math><mrow><mn>2</mn><mo>.</mo><mn>2</mn><mo>×</mo></mrow></math></span> speedup and 45% energy savings over a baseline PUM accelerator without any optimization. Compared to a TPU-like accelerator, ARAS provides up to <span><math><mrow><mn>1</mn><mo>.</mo><mn>5</mn><mo>×</mo></mrow></math></span> speedup and 62% energy savings.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103668"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145885131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Efficient column-wise N:M pruning on RISC-V CPU RISC-V CPU上高效的按列N:M修剪

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2025-12-26 DOI: 10.1016/j.sysarc.2025.103667

Chi-Wei Chu, Ding-Yong Hong, Jan-Jan Wu

{"title":"Efficient column-wise N:M pruning on RISC-V CPU","authors":"Chi-Wei Chu, Ding-Yong Hong, Jan-Jan Wu","doi":"10.1016/j.sysarc.2025.103667","DOIUrl":"10.1016/j.sysarc.2025.103667","url":null,"abstract":"<div><div>In deep learning frameworks, weight pruning is a widely used technique for improving computational efficiency by reducing the size of large models. This is especially critical for convolutional operators, which often act as performance bottlenecks in convolutional neural networks (CNNs). However, the effectiveness of pruning heavily depends on how it is implemented, as different methods can significantly impact both computational performance and memory footprint. In this work, we propose a column-wise N:M pruning strategy applied at the tile level and modify XNNPACK to enable efficient execution of pruned models on the RISC-V vector architecture. Additionally, we propose fusing the operations of im2col and data packing to minimize redundant memory accesses and memory overhead. To further optimize performance, we incorporate AITemplate’s profiling technique to identify the optimal implementation for each convolutional operator. Our proposed approach effectively increases ResNet inference throughput by as much as <span><math><mrow><mn>4</mn><mo>×</mo></mrow></math></span>, and preserves ImageNet top-1 accuracy within 2.1% of the dense baseline. The code of our framework is publicly available at <span><span>https://github.com/wewe5215/AI_template_RVV_backend</span><svg><path></path></svg></span></div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103667"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145885132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Group theory-based differential evolution algorithm for efficient DAG scheduling on heterogeneous clustered multi-core system 基于群理论的异构集群多核系统DAG高效调度差分进化算法

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2026-01-05 DOI: 10.1016/j.sysarc.2026.103695

Yaodong Guo, Shuangshuang Chang, Dong Ji, Shiyue Qin, Te Xu

{"title":"Group theory-based differential evolution algorithm for efficient DAG scheduling on heterogeneous clustered multi-core system","authors":"Yaodong Guo, Shuangshuang Chang, Dong Ji, Shiyue Qin, Te Xu","doi":"10.1016/j.sysarc.2026.103695","DOIUrl":"10.1016/j.sysarc.2026.103695","url":null,"abstract":"<div><div>Efficient parallel application scheduling algorithms are crucial for optimizing performance on heterogeneous clustered multi-core systems. The primary objective of scheduling is to reduce the makespan of parallel applications, typically represented as Directed Acyclic Graphs (DAGs). This paper introduces a Group Theory-based Differential Evolution (GTDE<span><span><sup>1</sup></span></span>) algorithm to address the NP-complete DAG scheduling problem, to minimize makespan and computation time. The GTDE algorithm leverages group theory to explore the inherent symmetry in system architectures, enabling the classification of scheduling schemes and thus reducing redundant computations while maintaining population diversity. To further enhance performance, the algorithm employs an Opposition-Based Learning (OBL) strategy to improve the initial population and integrates a hybrid mutation strategy for more efficient exploration of the solution space. Experimental results demonstrate that the GTDE algorithm consistently outperforms state-of-the-art DAG scheduling algorithms in terms of performance metrics, such as makespan and computation time, with average improvements of 36% and 73%, respectively, achieving superior performance across various scenarios.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103695"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145927173","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

MxGPU: Efficient and safe communication between GPGPU applications in an OS-controlled GPGPU multiplexing environment MxGPU：在操作系统控制的GPGPU多路复用环境中，实现GPGPU应用间高效、安全的通信

IF 4.1 2区计算机科学

Journal of Systems Architecture Pub Date : 2026-03-01 Epub Date: 2025-12-24 DOI: 10.1016/j.sysarc.2025.103669

Marcel Lütke Dreimann, Olaf Spinczyk

{"title":"MxGPU: Efficient and safe communication between GPGPU applications in an OS-controlled GPGPU multiplexing environment","authors":"Marcel Lütke Dreimann, Olaf Spinczyk","doi":"10.1016/j.sysarc.2025.103669","DOIUrl":"10.1016/j.sysarc.2025.103669","url":null,"abstract":"<div><div>With the growing demand for artificial intelligence and other data-intensive applications, the demand for graphics processing units (GPUs) has also increased. Even though there are many approaches on multiplexing GPUs, none of the approaches known to us enable the operating system to coherently integrate GPU resources alongside CPU resources into a holistic resource management. Due to the history of GPUs, GPU drivers are still a large, isolated part within the driver stack of operating systems. This paper aims to conduct a case study on how a multiplexing solution for GPGPUs could look like, where the OS is able to define scheduling policies for GPGPU tasks and manage GPU memory. OS-controlled GPU memory management can especially be helpful for efficient and safe communication between GPGPU applications. We will discuss and evaluate the architecture of <span>MxGPU</span>, which offers software-based multiplexing of integrated Intel GPUs. <span>MxGPU</span> has a tiny code base, which is a precondition for formal verification approaches and usage in safety-critical environments. Experiments with our prototype show that <span>MxGPU</span> can grant the operating system control over GPU resources while allowing more GPU sessions. Furthermore, <span>MxGPU</span> allows for execution of GPGPU tasks with less latency compared to Linux and enables efficient and safe communication between GPU applications.</div></div>","PeriodicalId":50027,"journal":{"name":"Journal of Systems Architecture","volume":"172 ","pages":"Article 103669"},"PeriodicalIF":4.1,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145841942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0