{"title":"Wideband 0.18μm CMOS VCO using active inductor with negative resistance","authors":"Grzegorz Szczepkowski, G. Baldwin, R. Farrell","doi":"10.1109/ECCTD.2007.4529765","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529765","url":null,"abstract":"This paper presents a wideband voltage controlled oscillator topology based on an active inductor generating negative resistance. The proposed architecture covers a frequency band between 1.325 GHz - 2.15 GHz with average in-band phase noise of -86 dBc/Hz at 1 MHz offset from the carrier frequency. Power consumption of the oscillator core is 28 mW from a 1.8 V supply. The circuit has been simulated in Eldo RF (Design Architect IC, Mentor Graphics) using UMC 0.18 mum 1P6M Salicide RF CMOS model libraries.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134314921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Ghahramani, S. Daneshgar, Michael Peter Kennedy, O. Feo
{"title":"Optimizing the design of an injection-locked frequency divider by means of nonlinear analysis","authors":"M. Ghahramani, S. Daneshgar, Michael Peter Kennedy, O. Feo","doi":"10.1109/ECCTD.2007.4529660","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529660","url":null,"abstract":"Injection-locked frequency dividers (ILFDs) are versatile analog circuit blocks used, for example, within phase-locked loops (PLLs). With respect to their digital counterparts, they have the advantages of a low power consumption and division ratios greater than two. The price for these advantages is believed to be a limited locking range. Here we show that this is not the case; indeed, by combining nonlinear systems theory (bifurcation analysis) with optimization techniques, we have significantly increased the locking range of a classical (LC oscillator-based) injection-locked frequency divider, predicting a locking range that is about twenty times greater than what has been reported in the literature to date. The wider locking range predicted by the theory has been confirmed by SPICE simulations.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131802851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The ultimate capacity of MIMO channels and its realization","authors":"Ruey-Wen Liu, R. Ying, Guozhi Xu","doi":"10.1109/ECCTD.2007.4529691","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529691","url":null,"abstract":"It has been shown recently that the point-to-point capacity can be significantly increased if multiple transmitting and receiving (MIMO) antennas are used [1], [2], [3] and [4]. Since the MIMO channel depends on the relative positions and the relative beam directions of their antennas, it may be interesting to find the limitation of the capacities of MIMO channels, i.e., the ultimate capacity. In this presentation, the explicit solution of ultimate capacity is derived. The criterion for the channel that realizes the ultimate capacity is presented. It is shown that when the ultimate capacity is realized, this ultimate channel can both block all interferences and raise the capacity to the ultimate capacity, which can not be achieved by either the commonly used coding/decoding technique or the signal processing technique. Simulation shows that the ultimate capacity is about 50% higher than the average capacity with strong interferences and 19% higher than the average capacity without interferences.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125216970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Some more robustness conditions for the invariant density of a class of 1D maps under additive noise","authors":"S. Callegari","doi":"10.1109/ECCTD.2007.4529777","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529777","url":null,"abstract":"Circuits based on chaotic maps are increasingly appealing to synthesize signals with prescribed statistical features. However, in their implementation one should not forget that electronic noise can affect the statistics, even by a large amount. Although dealing with the effects of noise on a strongly nonlinear system can be hard, it has recently been proved that classes of chaotic maps exist whose invariant density is completely insensitive to it, a property that makes them particularly well suited for implementation. This paper builds upon that initial framework, offering a wider set of sufficient conditions for general noise robustness. It also illustrates that other noise robustness mechanisms exist when the particular (yet reasonable) assumption of symmetrically distributed noise is made.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131176048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Tlelo-Cuautle, M. Duarte-Villaseñor, C. García, M. Fakhfakh, M. Loulou, C. Sánchez-López, G. R. Salgado
{"title":"Designing VFs by applying genetic algorithms from nullator-based descriptions","authors":"E. Tlelo-Cuautle, M. Duarte-Villaseñor, C. García, M. Fakhfakh, M. Loulou, C. Sánchez-López, G. R. Salgado","doi":"10.1109/ECCTD.2007.4529656","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529656","url":null,"abstract":"An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed method consists of three main steps: generation of the small-signal circuitry, addition of biases, and sizing by using standard CMOS technology of 0.35 mum. Furthermore, it is described how to synthesize VFs by codifying the three main steps into three kinds of genes, and how to select small-signal, biased, and sized topologies to generate potential solutions. Finally, several applications are discussed along with the evolution of VFs to design current conveyors.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115448189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Feedthrough cancellation in a class E amplified polar transmitter","authors":"S. Hietakangas, T. Rautio, T. Rahkonen","doi":"10.1109/ECCTD.2007.4529665","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529665","url":null,"abstract":"The purpose of this work is to study feedthrough cancellation methods available for a class E amplified polar transmitter. A mathematical feedthrough cancellation using measured S-parameters is presented. The results show a clear improvement to the nonlinear behaviour of a class E amplifier. Also, a transistor level possibility of feedthrough cancellation is discussed and simulated. With a large-signal S-parameter simulation, a 5 dB feedthrough attenuation was achieved.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124046392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Systematic equation formulation","authors":"E. Lindberg","doi":"10.1109/ECCTD.2007.4529761","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529761","url":null,"abstract":"A tutorial giving a very simple introduction to the set-up of the equations used as a model for an electrical/electronic circuit. The aim is to find a method which is as simple and general as possible with respect to implementation in a computer program. The \"modified nodal approach\", MNA, and the \"controlled source approach\", CSA, for systematic equation formulation are investigated. It is suggested that the kernel of the PSpice program based on MNA is reprogrammed.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125871862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An automatic tool to design CNN-UM programs","authors":"G. E. Pazienza, X. Vilasís-Cardona, K. Karacs","doi":"10.1109/ECCTD.2007.4529640","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529640","url":null,"abstract":"Programs for the Cellular Neural Network - Universal Machine are usually designed explicitly, and there is no method to create them automatically. In this paper we present a tool, based on a genetic approach, capable of determining what CNN templates compose a CNN-UM program performing a given image processing task, and in which order they must be applied to the input. The effectiveness of our system is demonstrated experimentally on real-life problems, like the route number detection on public transport vehicles.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125874583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Transmission line modelling using wave equation standing-wave solutions as basis functions","authors":"A. Tanskanen","doi":"10.1109/ECCTD.2007.4529682","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529682","url":null,"abstract":"A transmission line model using standing-wave solutions as a base is proposed. The model is compared with an existing dispersive transmission line model with favorable results. Application to termination optimization problem of a lossy transmission line is also demonstrated.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129145138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA implementation of 3D discrete wavelet transform for real-time medical imaging","authors":"Richard M. Jiang, D. Crookes","doi":"10.1109/ECCTD.2007.4529647","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529647","url":null,"abstract":"3D discrete wavelet transform (DWT) is a compute-intensive task that is usually implemented on specific architectures in many real-time medical imaging systems. In this paper, a novel area-efficient high-throughput 3D DWT architecture is proposed based on distributed arithmetic. A tap-merging technique is used to reduce the size of DA lookup tables. The proposed architectures were designed in VHDL and mapped to a Xilinx Virtex-E FPGA. The synthesis results show the proposed architecture has a low area cost and can run up to 85 MHz, which can perform a five-level 3D wavelet analysis for seven 128 times 128 times 128 volume images per second.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128904757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}