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2007 18th European Conference on Circuit Theory and Design最新文献

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FPGA implementation of a new scheme for the circuit realization of PWL functions 一种新的FPGA实现方案，用于电路实现PWL功能
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529736
Alessio Boggiano, Simone Delfitto, Tomaso Poggi, M. Storace
{"title":"FPGA implementation of a new scheme for the circuit realization of PWL functions","authors":"Alessio Boggiano, Simone Delfitto, Tomaso Poggi, M. Storace","doi":"10.1109/ECCTD.2007.4529736","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529736","url":null,"abstract":"A new scheme for the circuit realization of multivariate PWL functions is proposed. A three-variate version is implemented on an FPGA board. A comparison with respect to another scheme, already implemented on chip, is provided, showing that the new scheme is more complex, but reduces the computation times. Two benchmark examples are considered to show the high accuracy of the circuit in the representation of PWL functions.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121616465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Models for the LE-FDTD resistive voltage source spanning multiple cells 跨多单元的LE-FDTD阻性电压源模型
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529685
L. Costa, K. Nikoskinen, M. Valtonen
{"title":"Models for the LE-FDTD resistive voltage source spanning multiple cells","authors":"L. Costa, K. Nikoskinen, M. Valtonen","doi":"10.1109/ECCTD.2007.4529685","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529685","url":null,"abstract":"Two approaches for implementing the LE-FDTD resistive voltage source spanning multiple cells are presented. The stability of these models are compared to a stable model presented in the literature. Additionally, the accuracy of all three models is evaluated in the time and frequency domains. Model 2 in this paper is in good agreement with the model from the literature, its computational load and memory requirements are smaller, and it is the simplest of the models discussed to implement.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114700455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Current sensing completion detection for subthreshold asynchronous circuits 亚阈值异步电路的电流传感完成检测
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529611
Omer Can Akgun, Y. Leblebici, E. Vittoz
{"title":"Current sensing completion detection for subthreshold asynchronous circuits","authors":"Omer Can Akgun, Y. Leblebici, E. Vittoz","doi":"10.1109/ECCTD.2007.4529611","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529611","url":null,"abstract":"In this paper a novel completion detection method for self-timed, asynchronous subthreshold circuits is presented. By employing the self-timed operation principle, substantial speed gains in the operation of the asynchronous pipelines can be realized. The completion detection system is very simple, consisting of a sensor transistor, a very basic AC-coupled amplifier and a monostable multivibrator. The proposed method can be easily integrated into the CMOS design flow. The advantages of the proposed completion detection system is shown through simulations on an 16-bit ripple carry adder in a standard 0.18 mum CMOS process operating at 400 mV supply voltage.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114842407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Modeling of linear-assisted DC-DC converters 线性辅助DC-DC变换器的建模
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529670
Herminio Marténez, A. Conesa
{"title":"Modeling of linear-assisted DC-DC converters","authors":"Herminio Marténez, A. Conesa","doi":"10.1109/ECCTD.2007.4529670","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529670","url":null,"abstract":"This paper shows the modeling of a linear-assisted or hybrid (linear & switching) DC-DC converters. In this kind of converters, an auxiliary linear regulator is used, which objective is to cancel the ripple at the output voltage and provide fast responses for load variations. On the other hand, a switching converter, connected in parallel with the linear regulator, allows to supply almost the whole output current demanded by the load. The objective of this topology is to take advantage of the suitable regulation characteristics that series linear voltage regulators have, but almost achieving the high efficiency that switching DC-DC converters provide. Linear-assisted DC-DC converters are feedback systems with potential instability. Therefore, their modeling is mandatory in order to obtain design guidelines and assure stability of the implemented power supply system.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121948301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
Efficient construction and implementation of short LDPC codes for wireless sensor networks 无线传感器网络短LDPC码的高效构建与实现
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529693
James McDonagh, M. Sala, Antoin O'Allmhurain, Vaibhav Katewa, E. Popovici
{"title":"Efficient construction and implementation of short LDPC codes for wireless sensor networks","authors":"James McDonagh, M. Sala, Antoin O'Allmhurain, Vaibhav Katewa, E. Popovici","doi":"10.1109/ECCTD.2007.4529693","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529693","url":null,"abstract":"Wireless sensor networks gained a lot of attention in recent years due to their widespread applications. Reliability of data communication and power saving are paramount for applications which use wireless sensor network technology. We propose two classes of short quasi-cyclic LDPC codes suitable for implementation on a resource constrained system. The codes we propose are easy to encode and their decoding performance compares well with random LDPC codes with the same parameters. We implement our codes on a 25 mm mote platform provided by Tyndall and compare them with Viterbi coding schemes.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132340086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A path searching method based on circuit analysis for nonlinear resistive networks 基于电路分析的非线性电阻网络路径搜索方法
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529734
Masatoshi Sato, H. Aomori, Mamoru Tanaka
{"title":"A path searching method based on circuit analysis for nonlinear resistive networks","authors":"Masatoshi Sato, H. Aomori, Mamoru Tanaka","doi":"10.1109/ECCTD.2007.4529734","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529734","url":null,"abstract":"In this paper, we propose a novel path searching method based on the local winner take all (WTA) circuits that are constructed by corporative and competitive networks to find the maximum local current on each node connected to nonlinear resistance. By putting nonlinear resistances on the network, the network has a saturation characteristic of current. Each nonlinear resistance is a sigmoidal function according to Ohm's law. By using the analysis of the nonlinear resistive network, the equilibrium solution can be represented as maximum-flow from a starting point to a terminal point. The maximum-flow result is often used to request the communication charge of each branch capacity and the maximum communication charge in the network. Therefore, our research is applicable in the communication network. Moreover, finding the optimal path of the network can be related to a quality of service (QoS).","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132519123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Distortion analysis in the frequency domain of a Gm-C biquad Gm-C双轴频域畸变分析
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529574
G. Palumbo, M. Pennisi, S. Pennisi
{"title":"Distortion analysis in the frequency domain of a Gm-C biquad","authors":"G. Palumbo, M. Pennisi, S. Pennisi","doi":"10.1109/ECCTD.2007.4529574","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529574","url":null,"abstract":"Evaluation of the harmonic distortion in the frequency domain for a G m-C biquad filter is carried out by using a phasor notation. This approach allows a pencil and paper analysis, thus yielding a clever understanding of harmonic generation and highlighting the role of each single contribution. Theoretical results are compared and validated through spectre simulations.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132551674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
High frequency chaos oscillators with applications 高频混沌振荡器及其应用
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529774
A. S. Demirkol, Vedat Tavas, S. Özoguz, A. Toker
{"title":"High frequency chaos oscillators with applications","authors":"A. S. Demirkol, Vedat Tavas, S. Özoguz, A. Toker","doi":"10.1109/ECCTD.2007.4529774","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529774","url":null,"abstract":"Two integrated chaotic oscillators based on negative- gm LC tank circuit are presented. Simulations using Spectre in CADENCE design tools show that one of the proposed circuits generates chaos in the gigahertz frequency region. The applications of the chaotic circuits in random bit generations are also described. Experimental results using standard statistical tests show that the binary streams generated by the described random number generator have good statistical properties.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"18 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134259145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Classification of parallel DC/DC converters part I: circuit theory 并联DC/DC变换器的分类第1部分:电路原理
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529770
Yuehui Huang, C. Tse
{"title":"Classification of parallel DC/DC converters part I: circuit theory","authors":"Yuehui Huang, C. Tse","doi":"10.1109/ECCTD.2007.4529770","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529770","url":null,"abstract":"This paper describes a classification of paralleling schemes for dc/dc converters from a circuit theoretic viewpoint. The purpose is to provide a systematic classification of the types of parallel converters that can clearly identify all possible structures and control configurations, allowing simple and direct comparison of the characteristics and limitations of different paralleling schemes. In the proposed classification, converters are modeled as current sources or voltage sources, and their connection possibilities are categorized systematically into three basic types. Moreover, control arrangements are classified according to the presence of current-sharing and voltage-regulation loops. Comparison is presented to illustrate the characteristics of the various schemes.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133999901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A nanopower double-mode 1-V frequency reference for an ultra-low-power capacitive sensor interface 一种超低功耗电容式传感器接口的纳米双模1-V频率基准
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529547
M. Paavola, M. Saukoski, M. Laiho, K. Halonen
{"title":"A nanopower double-mode 1-V frequency reference for an ultra-low-power capacitive sensor interface","authors":"M. Paavola, M. Saukoski, M. Laiho, K. Halonen","doi":"10.1109/ECCTD.2007.4529547","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529547","url":null,"abstract":"In this paper, a nanopower CMOS frequency reference designed with a 0.25-mum BiCMOS process for an ultra- low-power capacitive sensor interface is presented. Due to the low supply voltage of 1 V, two parallel frequency references based on source-coupled CMOS multivibrators are used to implement the two required operating modes. In mode 1, when driving a 1 pF capacitive load at 24.6 kHz, the frequency reference consumes 210 nA. In mode 2, driving the same load at 307.2 kHz consumes 660 nA, respectively. Typical simulated frequency stabilities over the temperature and supply voltage ranges in modes 1 and 2 are plusmn10.7% and plusmn6.1 %, respectively. Simulated phase noises at 10 kHz offset frequency in mode 1, and at 100 kHz offset frequency in mode 2, are approximately -67 dBc/Hz and -68 dBc/Hz, respectively.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"301 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134180212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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