JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004.最新文献

A new method to measure temperature- and power-dependent thermal resistance of HBTs 一种测量高温超导体温度和功率相关热阻的新方法

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184343

R. Menozzi, J. Barrett, P. Ersland

引用次数: 1

Reliability characterization of MOVPE grown n-GaInP/p-GaAs heterojunctions vis-a-vis high temperature operation through photoreflectance spectroscopy, transmission electron microscopy and deep level transient spectroscopy 通过光反射光谱、透射电子显微镜和深能级瞬态光谱表征MOVPE生长n-GaInP/p-GaAs异质结相对于高温操作的可靠性

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184340

S. Madra

{"title":"Reliability characterization of MOVPE grown n-GaInP/p-GaAs heterojunctions vis-a-vis high temperature operation through photoreflectance spectroscopy, transmission electron microscopy and deep level transient spectroscopy","authors":"S. Madra","doi":"10.1109/ROCS.2004.184340","DOIUrl":"https://doi.org/10.1109/ROCS.2004.184340","url":null,"abstract":"The paper presents a detailed characterization of the lattice-matched n-GaInP/p-GaAs heterostructures, including the evolution of the heterojunction and its departure from the initial state under elevated temperatures and current stress. GaInP/GaAs heterojunctions, which constitute the emitter-base junction for contemporary HBTs, were generated using MOVPE. Photoreflectance spectroscopy (PR) has been used to determine the GaInP ordering and bandgap energy, while cross-section TEM has been used to determine the GaInP/GaAs interface region for evidence of defects. p-n tunnel diode samples were generated and characterized to determine the rate of carbon diffusivity under temperature and current induced effects, to provide quantitative measurement of degradation of HBT base layer as seen from carbon precipitate-type artifacts from XTEM analysis. Moreover, n-GaInP/p/sup +/-GaAs diodes were generated for deep-level transient spectroscopy (DLTS) to gain information on traps and trap kinetics from current-stress. The data from the various characterization techniques is utilized to provide the degradation mechanisms for n-GaInP/p-GaAs HBTs. While no evidence of dislocations at the GaInP/GaAs interface was found in our samples, a model for determination of the relaxation time for dislocation scattering is also presented.","PeriodicalId":437858,"journal":{"name":"JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004.","volume":"147 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134120955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Acceleration parameters and reliability of SiGe HBTs during long-term forward-biased operation SiGe HBTs长期正偏运行时加速度参数及可靠性研究

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184344

P. Rosenthal, B. Paine, N. T. Kubota, D. Sunderland

{"title":"Acceleration parameters and reliability of SiGe HBTs during long-term forward-biased operation","authors":"P. Rosenthal, B. Paine, N. T. Kubota, D. Sunderland","doi":"10.1109/ROCS.2004.184344","DOIUrl":"https://doi.org/10.1109/ROCS.2004.184344","url":null,"abstract":"We have conducted accelerated lifetesting on discrete HBTs fabricated with the IBM SiGe5HP HBT technology, and determined the dependence of the wear-out on emitter interconnect temperature and current density. The wearout occurred by degradation of DC current gain, /spl beta/, caused by increase of the base current. The characteristics and the parametric dependences of the /spl beta/ degradation were consistent with an electromigration (EM) mechanism originally developed by IBM. EM in the emitter interconnects causes compressive stress on the emitter semiconductor sufficient to alter the semiconductor energy band structure, leading to an increase in base current and associated reduction in /spl beta/. Utilizing our empirically determined acceleration parameters, we have estimated the worst-case expected changes in /spl beta/ during typical use conditions (125 /spl deg/C, J/sub i/=1.0 mA//spl mu/m/sup 2/). The results showed that after 20 years /spl beta/ would degrade by approximately 17/spl plusmn/1%. This degradation is insignificant for most IC applications, and we therefore conclude that this technology is highly reliable during long-term forward-active bias operation.","PeriodicalId":437858,"journal":{"name":"JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126484450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

The impact of emitter fingers layout and geometry on InGaP HBT thermal resistance 射极指形布局和几何形状对InGaP高温热阻的影响

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184342

E. Yu, D. Hill, L. Zhang, O. Hartin

引用次数: 2

Reliability of GaAs PIN switches for high frequency and high power applications 用于高频和高功率应用的GaAs PIN开关的可靠性

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184354

Xinxing Yang, P. Ersland, D. Hoag

引用次数: 1

Minimizing gate lag of a planar high-power GaAs MESFET by Al/sub 2/O/sub 3/ passivation and optimized gate process Al/sub 2/O/sub 3/钝化及优化栅极工艺最小化平面大功率GaAs MESFET栅极滞后

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184347

B. Yang, P. Ye, K. Ng, J. Bude, G. Wilk

引用次数: 2

Studying yield and reliability relationships for metal defects 研究金属缺陷的良率和可靠性关系

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184353

W. Roesch, D. Hamada

引用次数: 12

The effect of elevated temperature lifetest on low frequency noise performance in GaAs PHEMT dual gate MMICs [LNA example] 高温寿命试验对GaAs PHEMT双栅mmic低频噪声性能的影响[LNA示例]

JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004. Pub Date : 1900-01-01 DOI: 10.1109/ROCS.2004.184348

Y. Chou, L. Callejo, M. Biedenbander, K. Lee, B. Allen, R. Lai, Q. Kan, R. Grundbacher, D. Leung, D. Eng, T. Block, A. Oki

{"title":"The effect of elevated temperature lifetest on low frequency noise performance in GaAs PHEMT dual gate MMICs [LNA example]","authors":"Y. Chou, L. Callejo, M. Biedenbander, K. Lee, B. Allen, R. Lai, Q. Kan, R. Grundbacher, D. Leung, D. Eng, T. Block, A. Oki","doi":"10.1109/ROCS.2004.184348","DOIUrl":"https://doi.org/10.1109/ROCS.2004.184348","url":null,"abstract":"The dual gate layout configuration has become a versatile approach for compact and high performance MMIC design for commercial, and military/space applications. In this paper, we describe a method that was developed to lifetest compact (0.81 mm/sup 2/) dual gate GaAs PHEMT low noise amplifiers (LNAs) operating from DC to 1 GHz. The objective of the lifetest is to evaluate the effect of elevated temperature on low frequency noise performance from 10-40 MHz. The results exhibit a decrease of noise figure (NF) at 10-40 MHz (approximately 0.25 to 0.5 dB) in a dual gate LNA subjected to lifetest at T/sub ambient/ of 200/spl deg/C. This might be attributed to the gate leakage current reduction at either the interface of gate metal-AlGaAs or nitride-AlGaAs, thus possibly reducing the effect of generation-recombination (primary origin of low frequency noise). On the other hand, the change of noise figure at frequencies beyond 100 MHz is not noticeable. In summary, we have demonstrated a method to effectively lifetest a compact and high performance MMIC designed with a dual gate configuration.","PeriodicalId":437858,"journal":{"name":"JEDEC (formerly the GaAs REL Workshop) ROCS Workshop, 2004.","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128596724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1