ACM International Conference on Computing Frontiers最新文献_第8页

A limits study of benefits from nanostore-based future data-centric system architectures 基于纳米存储的未来以数据为中心的系统架构的局限性研究

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212915

Jichuan Chang, Parthasarathy Ranganathan, T. Mudge, D. Roberts, Mehul A. Shah, Kevin T. Lim

引用次数: 19

Improving energy efficiency for mobile platforms by exploiting low-power sleep states 通过利用低功耗睡眠状态来提高移动平台的能源效率

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212928

Alexander W. Min, Ren Wang, James Tsai, M. A. Ergin, T. Tai

{"title":"Improving energy efficiency for mobile platforms by exploiting low-power sleep states","authors":"Alexander W. Min, Ren Wang, James Tsai, M. A. Ergin, T. Tai","doi":"10.1145/2212908.2212928","DOIUrl":"https://doi.org/10.1145/2212908.2212928","url":null,"abstract":"Reducing energy consumption is one of the most important design aspects for small form-factor mobile platforms, such as smartphones and tablets. Despite its potential for power savings, optimally leveraging system low-power sleep states during active mobile workloads, such as video streaming and web browsing, has not been fully explored. One major challenge is to make intelligent power management decisions based on, among other things, accurate system idle duration prediction, which is difficult due to the non-deterministic system interrupt behavior. In this paper, we propose a novel framework, called E2S3 (Energy Efficient Sleep-State Selection), that dynamically enters the optimal low-power sleep state to minimize the system power consumption. In particular, E2S3 detects and exploits short idle durations during active mobile workloads by, (i) finding optimal thresholds (i.e., energy break-even times) for multiple low-power sleep states, (ii) predicting the sleep-state selection error probabilities heuristically, and by (iii) selecting the optimal sleep state based on the expected reward, e.g., power consumption, which incorporates the risks of making a wrong decision We implemented and evaluated E2S3 on Android-based smartphones, demonstrating the effectiveness of the algorithm. The evaluation results show that E2S3 significantly reduces the platform energy consumption, by up to 50% (hence extending battery life), without compromising system performance.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134083206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 36

Architectural support of multiple hypervisors over single platform for enhancing cloud computing security 在单个平台上对多个管理程序的体系结构支持，以增强云计算安全性

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212920

Wei-qi Shi, Jong-Hyuk Lee, Taeweon Suh, Dong Hyuk Woo, Xinwen Zhang

{"title":"Architectural support of multiple hypervisors over single platform for enhancing cloud computing security","authors":"Wei-qi Shi, Jong-Hyuk Lee, Taeweon Suh, Dong Hyuk Woo, Xinwen Zhang","doi":"10.1145/2212908.2212920","DOIUrl":"https://doi.org/10.1145/2212908.2212920","url":null,"abstract":"This paper presents MultiHype, a novel architecture that supports multiple hypervisors (or virtual machine monitors) on a single physical platform by leveraging many-core based cloud-on-chip architecture. A MultiHype platform consists of a control plane and multiple hypervisors created on-demand, each can further create multiple guest virtual machines. Supported at architectural level, a single platform using MultiHype can behave as a distributed system with each hypervisor and its virtual machines running independently and concurrently. As a direct consequence, vulnerabilities of one hypervisor or its guest virtual machine can be confined within its own domain, which makes the platform more resilient to malicious attacks and failures in a cloud environment. Towards defending against resource exhaustion attacks, MultiHype further implements a new cache eviction policy and memory management scheme for preventing resource monopolization on shared cache, and defending against denial of resource exploits on physical memory resource launched from malicious virtual machines on shared platform. We use Bochs emulator and cycle based x86 simulation to evaluate the effectiveness and performance of MultiHype.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114336110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

An efficient vectorization of linked-cell particle simulations 链接细胞粒子模拟的有效矢量化

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212943

W. Eckhardt, A. Heinecke

引用次数: 12

Learning, evolution and adaptation in racing games 赛车游戏中的学习、进化和适应

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212953

D. Loiacono

引用次数: 7

Instructions activating conditions for hardware-based auto-scheduling 激活基于硬件的自动调度条件的指令

ACM International Conference on Computing Frontiers Pub Date : 2012-05-15 DOI: 10.1145/2212908.2212946

S. Lovergine, Fabrizio Ferrandi

{"title":"Instructions activating conditions for hardware-based auto-scheduling","authors":"S. Lovergine, Fabrizio Ferrandi","doi":"10.1145/2212908.2212946","DOIUrl":"https://doi.org/10.1145/2212908.2212946","url":null,"abstract":"Nowadays, implementing hardware accelerators by hand-writing the RTL still leads to better quality of the results with respect to those obtained by automating the design process. Manually developing and maintaining hardware designs, however, is a complex, time-consuming and error prone task, making improvements in the automatic design flow definition a fervent ongoing research topic. The most common approach is based on a statically computed scheduling order. Supports for features such as dynamic scheduling or unbounded latency of operations and functional units have been proposed with some limitations. Instructions auto-scheduling is an alternative to overcome such restrictions, while facing those situations that need or take advantage of run-time adaptive reordering of the instructions.\u0000 This paper focuses on how to improve the synthesis of hardware cores by increasing automatic parallelism exploitation. The proposed approach computes the set of conditions to be satisfied for each instruction to be executed as soon as possible, allowing run-time auto-scheduling. Representing such conditions as logic functions, the corresponding hardware implementation can be easily automated. Experimental results have shown an encouraging enhancement in terms of performance, with a limited increase of area.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114749552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A reconfigurable cache architecture for energy efficiency 一个可重构的能源效率缓存架构

ACM International Conference on Computing Frontiers Pub Date : 2011-05-03 DOI: 10.1145/2016604.2016616

Karthik T. Sundararajan, Timothy M. Jones, N. Topham

引用次数: 10

Hybrid high-performance low-power and ultra-low energy reliable caches 混合高性能低功耗和超低能耗可靠缓存

ACM International Conference on Computing Frontiers Pub Date : 2011-05-03 DOI: 10.1145/2016604.2016619

Bojan Maric, J. Abella, F. Cazorla, M. Valero

引用次数: 7

Leveraging data-structure semantics for efficient algorithmic parallelism 利用数据结构语义实现高效的算法并行性

ACM International Conference on Computing Frontiers Pub Date : 2011-05-03 DOI: 10.1145/2016604.2016638

Romain Cledat, K. Ravichandran, S. Pande

{"title":"Leveraging data-structure semantics for efficient algorithmic parallelism","authors":"Romain Cledat, K. Ravichandran, S. Pande","doi":"10.1145/2016604.2016638","DOIUrl":"https://doi.org/10.1145/2016604.2016638","url":null,"abstract":"Irregular or pointer-based structures such as graphs and trees are commonly used in algorithms dealing with sparse data. Given their reliance on pointers, these algorithms are difficult to analyze and the structure of their memory accesses is obfuscated which makes the extraction of parallelism difficult.\u0000 In this work, we present a framework that is capable of reasoning about the semantics of the dynamic data footprints of operations to determine their potential overlap. We leverage the knowledge the programmer has about access patterns for the algorithm but is currently unable to express. This knowledge allows our runtime to make either a parallelization decision or throttle concurrency to improve performance in Software Transactional Memories (STMs) [6]. Our framework relies on programmer-supplied predicates that are appropriately evaluated at runtime and utilized to probabilistically assert certain properties about data footprints.\u0000 We present simple abstractions and a low-overhead runtime to support our framework. We demonstrate our work by parallelizing a graph-coloring benchmark and by improving the transactional performance of benchmarks from the STAMP suite.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122397016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Cluster-based topologies for 3D stacked architectures 基于集群的3D堆叠结构拓扑

ACM International Conference on Computing Frontiers Pub Date : 2011-05-03 DOI: 10.1145/2016604.2016621

M. Daneshtalab, M. Ebrahimi, P. Liljeberg, J. Plosila, H. Tenhunen

引用次数: 7