2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems最新文献_第2页

Implementation of a Low Cost Wireless Distributed Control System using GSM Network 基于GSM网络的低成本无线分布式控制系统的实现

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798435

K. M. T. N. Ganegedara, J. Jayalath, K. Kumara, D. N. U. Pandithage, B. Samaranayake, E. Ekanayake, A. Alahakoon

引用次数: 2

An Analytical Approach to Direct IP Protection of VLSI Floorplans VLSI平面设计直接知识产权保护的分析方法

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798478

Debasri Saha, S. Sur-Kolay

{"title":"An Analytical Approach to Direct IP Protection of VLSI Floorplans","authors":"Debasri Saha, S. Sur-Kolay","doi":"10.1109/ICIINFS.2008.4798478","DOIUrl":"https://doi.org/10.1109/ICIINFS.2008.4798478","url":null,"abstract":"In the DSM VLSI technology, wide-spread design reuse to meet customer's requirements in time enhances the probability of infringement of intellectual property (IP) of VLSI physical design. In design storage or during design transmission between two parties, encryption of a design file is a well-known technique to protect a design against hacking, although it takes significantly long time to encrypt large design files. While encryption basically substitutes and shuffles the bits/ASCII values of a file to conceal the contents of the file, the IP value of a design obtained from optimized partitioning, floorplanning and placement can be protected by redistribution of design elements in the modules and exchanging the locations and orientations of the design modules. As security of design through perturbation exploits the basic properties of physical design, this technique is applicable to protect any intermediate phase, not restricted to binary/ASCII GDSII/OASIS file format only. In this paper, encoding moves for various floorplan representations are analyzed in terms of their time and space requirements. Experimental results on MCNC benchmarks are encouraging.","PeriodicalId":429889,"journal":{"name":"2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132395755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Weight Based Edge Disjoint Path Routing and Wavelength Assignment (WEDP-RWA) Algorithm for WDM Networks WDM网络中基于权重的边缘不相交路径路由和波长分配(WEDP-RWA)算法

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798409

V. S. Shekhawat, D. K. Tyagi, V. K. Chaubey

引用次数: 8

Electric Arc Furnace Modeling and Voltage Flicker Mitigation by DSTATCOM 基于DSTATCOM的电弧炉建模与电压闪变抑制

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798451

K. Anuradha, Bishnu Prasad Muni, A. D. R. Kumar

引用次数: 5

Assessment of Financial Losses due to Voltage Sags in an Indian Distribution System 印度配电系统电压跌落造成的经济损失评估

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798350

A. Goswami, C. P. Gupta, G. Singh

引用次数: 12

Quarter-Rate Implementation of an 1 GSPS 128 Tap FIR Structure used as Cross-correlator in UWB Communication 1 GSPS 128分接FIR结构在超宽带通信中作为交叉相关器的四分之一速率实现

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798457

T. Chakraborty, S. Chakrabarti

{"title":"Quarter-Rate Implementation of an 1 GSPS 128 Tap FIR Structure used as Cross-correlator in UWB Communication","authors":"T. Chakraborty, S. Chakrabarti","doi":"10.1109/ICIINFS.2008.4798457","DOIUrl":"https://doi.org/10.1109/ICIINFS.2008.4798457","url":null,"abstract":"Finite impulse response (FIR) filters are widely used in many applications involving signal processing algorithms. The FIR can also be used as a convolver or as a cross-correlator due to its structural similarity. In general the problem with the hardware implementation of FIR is mainly the area complexity and this is much prominent if the number of taps is pretty large. For high throughput application, like UWB communication, the designer is forced to go for parallel-pipelined design and this increases the complexity many fold. Parallel architecture is required not only to meet the stringent throughput requirement but also to save power consumption. However an L level parallelization typically increases the number of computations (multiplications + additions) by L times compared to a single level FIR architecture. This increases the area complexity around L times. Typically the area complexity of multiplier is much more than an adder. A significant amount of research work has been conducted to reduce the multiplication complexity of FIR architecture. In this paper we present an adder-tree based multiplier block parallel FIR architecture which reduces the multiplication complexity in many fold compared to standard multiplier based or Canonic Signed Digit (CSD) based multiplier architecture. We also present a simple way of forming the exhaustive adder-tree multiplier block.","PeriodicalId":429889,"journal":{"name":"2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124180365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Implementation of Self Balancing Space Vector Switching Modulator for Three-Level Inverter 三电平逆变器自平衡空间矢量开关调制器的实现

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798332

P. J. Patel, Rakeshkumar A. Patel, V. Patel, P. N. Tekwani

引用次数: 3

DVR with Sliding Mode Control to alleviate Voltage Sags on a Distribution System for Three Phase Short Circuit Fault 采用滑模控制的DVR减轻配电系统三相短路故障时电压跌落的影响

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798344

G. V. Kumar, D. Chowdary

{"title":"DVR with Sliding Mode Control to alleviate Voltage Sags on a Distribution System for Three Phase Short Circuit Fault","authors":"G. V. Kumar, D. Chowdary","doi":"10.1109/ICIINFS.2008.4798344","DOIUrl":"https://doi.org/10.1109/ICIINFS.2008.4798344","url":null,"abstract":"Control of most of the industrial loads is mainly based on semiconductor devices, which causes such loads to be more sensitive against power system disturbances. Thus, the power quality problems have gained more interest recently. Voltage sags are mainly caused due to starting of large induction motors, switching of large inductive loads, short circuit faults in transmission and distribution systems and energizing of large transformers. Therefore, different solutions are examined to compensate these sags and to avoid production losses at sensitive loads. Dynamic voltage restorer (DVR) is one of the solutions to realize this goal. For a successful compensation, the DVR must be able to detect the voltage sag and control the inverter to restore the voltage. The Sliding mode control is used for the DVR. Using Sliding mode control to the DVR, additional sag detection method is eliminated. This improves the dynamic response of the DVR and also DVR is able to compensate for any variation in source voltage. In this paper, a DVR with sliding mode control strategy is used to alleviate the voltage sags caused due to faults occurring on the parallel feeders in a three-phase distribution system. The DVR along with the other parts of the distribution system are simulated using MATLAB/SIMULINK.","PeriodicalId":429889,"journal":{"name":"2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123518296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 35

Data Aggregation in Static Adhoc Networks 静态Adhoc网络中的数据聚合

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798354

S. Srinivasan, A. Azadmanesh

引用次数: 3

A Novel Technique to Reduce both Leakage and Peak Power during Scan Testing 一种降低扫描测试中泄漏和峰值功率的新技术

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems Pub Date : 2008-12-01 DOI: 10.1109/ICIINFS.2008.4798402

Subhadip Kundu, S. Chattopadhyay, K. Manna

引用次数: 6