2020 IEEE International Electron Devices Meeting (IEDM)最新文献_第9页

Sub-1nm EOT WS2-FET with IDS > 600μA/μm at VDS=1V and SS < 70mV/dec at LG=40nm 亚1nm EOT WS2-FET, VDS=1V时IDS > 600μA/μm, LG=40nm时SS < 70mV/dec

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9372049

C. Pang, Peng Wu, J. Appenzeller, Zhihong Chen

引用次数: 8

Precision of synaptic weights programmed in phase-change memory devices for deep learning inference 用于深度学习推理的相变存储器中突触权值编程的精度

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9371990

S. Nandakumar, I. Boybat, Jin P. Han, S. Ambrogio, P. Adusumilli, R. Bruce, M. BrightSky, M. Rasch, M. Le Gallo, A. Sebastian

{"title":"Precision of synaptic weights programmed in phase-change memory devices for deep learning inference","authors":"S. Nandakumar, I. Boybat, Jin P. Han, S. Ambrogio, P. Adusumilli, R. Bruce, M. BrightSky, M. Rasch, M. Le Gallo, A. Sebastian","doi":"10.1109/IEDM13553.2020.9371990","DOIUrl":"https://doi.org/10.1109/IEDM13553.2020.9371990","url":null,"abstract":"The precision at which the conductance states can be programmed and maintained over time is central to the operation of analog resistance-based memory devices such as phase-change memory (PCM) in in-memory computing applications such as deep learning and scientific computing. Iterative programming with closed loop feedback is the most common approach towards programming an array of devices to achieve the desired conductance values as stipulated by the application. In this work, we analytically derive the precision associated with the iterative programming scheme and show that it is fundamentally limited by the read noise. The estimated programming noise quantitatively matches that measured experimentally on >1k PCM device arrays incorporating two types of doped GST phase-change materials. We further demonstrate that the conductance drift driven divergence of the programmed conductance states depends on the time of feedback in the iterative programming. Moreover, we studied the impact of the inaccuracy associated with synaptic weight storage on deep learning inference. We demonstrate significant accuracy retention improvements on CIFAR-10, CIFAR-100, and PTB benchmarks by tuning the time of feedback when programming weights on PCM-based DNN inference hardware.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125817328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

JEDEC-Qualified Highly Reliable 22nm FD-SOI Embedded MRAM For Low-Power Industrial-Grade, and Extended Performance Towards Automotive-Grade-1 Applications 符合jedec标准的高可靠22nm FD-SOI嵌入式MRAM，适用于低功耗工业级，并可扩展到汽车一级应用

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9371935

V. B. Naik, K. Yamane, T.Y. Lee, J. Kwon, R. Chao, J.H. Lim, N. Chung, B. Behin-Aein, L. Y. Hau, D. Zeng, Y. Otani, C. Chiang, Y. Huang, L. Pu, S. Jang, W. Neo, H. Dixit, S. K. L. C. Goh, E. Toh, T. Ling, J. Hwang, J. W. Ting, R. Low, L. Zhang, C.G. Lee, N. Balasankaran, F. Tan, K. W. Gan, H. Yoon, G. Congedo, J. Mueller, B. Pfefferling, O. Kallensee, A. Vogel, V. Kriegerstein, T. Merbeth, C. Seet, S. Ong, J. Xu, J. Wong, Y. You, S. Woo, T. Chan, E. Quek, S. Siah

{"title":"JEDEC-Qualified Highly Reliable 22nm FD-SOI Embedded MRAM For Low-Power Industrial-Grade, and Extended Performance Towards Automotive-Grade-1 Applications","authors":"V. B. Naik, K. Yamane, T.Y. Lee, J. Kwon, R. Chao, J.H. Lim, N. Chung, B. Behin-Aein, L. Y. Hau, D. Zeng, Y. Otani, C. Chiang, Y. Huang, L. Pu, S. Jang, W. Neo, H. Dixit, S. K. L. C. Goh, E. Toh, T. Ling, J. Hwang, J. W. Ting, R. Low, L. Zhang, C.G. Lee, N. Balasankaran, F. Tan, K. W. Gan, H. Yoon, G. Congedo, J. Mueller, B. Pfefferling, O. Kallensee, A. Vogel, V. Kriegerstein, T. Merbeth, C. Seet, S. Ong, J. Xu, J. Wong, Y. You, S. Woo, T. Chan, E. Quek, S. Siah","doi":"10.1109/IEDM13553.2020.9371935","DOIUrl":"https://doi.org/10.1109/IEDM13553.2020.9371935","url":null,"abstract":"We demonstrate highly reliable and mass-production ready 22nm FD-SOI 40Mb embedded-MRAM for industrial-grade (-40~125°C) applications. This technology having 5x solder reflows compatibility stack has passed JEDEC standard qualification (ECC-OFF) with total reliability failures below the product life-time bit-failure-rate requirement for industrial-grade. Using design-process co-optimization, we show the extended performance to meet -40~150°C product operation for Auto-Grade-1 applications with stable read performance, ~47% reduced read power, data retention of 20yrs (0.1 PPM), read disturb rate of <1 PPM for ~1M cycles with 500Oe field, 1M endurance cycles, and stand-by magnetic immunity (SMI) of ~1400Oe at 25°C and ~500Oe at 150°C (0.1 PPM). With magnetic shield-in package solution, we demonstrate ~4kOe SMI at 25°C for 48hrs of field exposure.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127490013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16

Hydrogen Absorption Method Using HfOx in Crystalline In-Ga-Zn Oxide FETs for NVM Applications 在NVM应用的晶体in - ga - zn氧化物场效应管中使用HfOx的吸氢方法

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9372030

T. Ono, Y. Yanagisawa, Y. Komatsu, T. Aoki, Y. Jimbo, S. Ito, Y. Yamane, N. Okuno, H. Kunitake, H. Komagata, S. Sasagawa, S. Yamazaki

{"title":"Hydrogen Absorption Method Using HfOx in Crystalline In-Ga-Zn Oxide FETs for NVM Applications","authors":"T. Ono, Y. Yanagisawa, Y. Komatsu, T. Aoki, Y. Jimbo, S. Ito, Y. Yamane, N. Okuno, H. Kunitake, H. Komagata, S. Sasagawa, S. Yamazaki","doi":"10.1109/IEDM13553.2020.9372030","DOIUrl":"https://doi.org/10.1109/IEDM13553.2020.9372030","url":null,"abstract":"We fabricated and evaluated an oxide semiconductor field effect transistor (OSFET) with a channel of c-axis aligned crystalline In-Ga-Zn oxide (CAAC-IGZO) in order to examine the availability of the OSFET in nonvolatile memories (NVM). A featured extremely low leakage current of the OSFET largely depends on the threshold voltage, and thus controlling the threshold is a key issue. In particular, reducing the hydrogen concentration in and around the CAAC-IGZO layer as much as possible is one of the most important factors leading to threshold controllability and stability improvement in the OSFET. Accordingly, we employed a structure in which the whole OSFET is sealed with a hydrogen barrier film (SiNx) to prevent hydrogen entry from the outside and provided a modified HfOx film that we found serves as a hydrogen absorption layer inside the encapsulation structure. The HfOx film having a high hydrogen absorption capability inside the encapsulation structure resulted in a significant improvement in OSFET reliability. Specifically, the prototype OSFET with a gate length of 43.9 nm had a suppressed threshold variation for 500 hours in the positive gate-bias temperature (+GBT) stress test (150°C, Vgs = 3.63 V, Vds = Vbgs = 0 V). This process enables the control of the hydrogen concentration in the CAAC-IGZO layer and increases the expectation for OSFET mass production.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125089225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node 5nm节点嵌入式域的高密度SOT-MRAM技术和设计规范

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9372068

M. Gupta, M. Perumkunnil, K. Garello, S. Rao, F. Yasin, G. Kar, A. Furnémont

{"title":"High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node","authors":"M. Gupta, M. Perumkunnil, K. Garello, S. Rao, F. Yasin, G. Kar, A. Furnémont","doi":"10.1109/IEDM13553.2020.9372068","DOIUrl":"https://doi.org/10.1109/IEDM13553.2020.9372068","url":null,"abstract":"Spin Orbit Torque (SOT) magnetic random-access memory (MRAM) offers the possibility to realize ultra-high-speed Non-Volatile memory technology without endurance issues that plague its more mature counterpart, STT-MRAM, but at cost of density. Based on our SOT-MRAM technology data, we explore different bit-cell architectures through extensive Design Technology Co-optimization (DTCO) to evaluate the most pareto-optimum solutions for High-Density [HD] and High-Performance [HP] and we design full SOT-MRAM macro for embedded domain. Our design-technology specifications projections show that using Resistance-Area (RA) product of 4 Ω.µm2, MTJ diameter of 32nm, SOT trackwidth of 35nm and SOT efficiency θSHE ≥1.4 enables: i) a HP SOT-MRAM macro with operating frequency (RD/WR) ≈1.05/0.71GHz at the 5nm process node and a 40% bit-cell area reduction compared to the 122 SRAM, ii) a HD SOT-MRAM macro with operating frequency (RD/WR) ≈ 1.1/0.45GHz and 37.5% area reduction compared to the 111 SRAM. Our analysis reveals that the bit line parasitic will be a limiting factor to SOT-MRAM performance at advanced nodes.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121857389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 23

Design Principle of Channel Material for Oxide-Semiconductor Field-Effect Transistor with High Thermal Stability and High On-current by Fluorine Doping 高热稳定高通流氧化半导体场效应晶体管通道材料氟掺杂设计原理

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9372121

H. Kawai, H. Fujiwara, J. Kataoka, N. Saito, T. Ueda, T. Enda, T. Ishihara, K. Ikeda

引用次数: 0

Anti-ferroelectric HfxZr1-xO2 Capacitors for High-density 3-D Embedded-DRAM 高密度三维嵌入式dram抗铁电HfxZr1-xO2电容器

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9372011

Sou-Chi Chang, N. Haratipour, S. Shivaraman, Tobias L. Brown-Heft, J. Peck, Chia-Ching Lin, I. Tung, Devin R. Merrill, Huiying Liu, Che-Yun Lin, F. Hamzaoglu, M. Metz, I. Young, J. Kavalieros, U. Avci

{"title":"Anti-ferroelectric HfxZr1-xO2 Capacitors for High-density 3-D Embedded-DRAM","authors":"Sou-Chi Chang, N. Haratipour, S. Shivaraman, Tobias L. Brown-Heft, J. Peck, Chia-Ching Lin, I. Tung, Devin R. Merrill, Huiying Liu, Che-Yun Lin, F. Hamzaoglu, M. Metz, I. Young, J. Kavalieros, U. Avci","doi":"10.1109/IEDM13553.2020.9372011","DOIUrl":"https://doi.org/10.1109/IEDM13553.2020.9372011","url":null,"abstract":"In this paper, a three-dimensional (3-D) deep-trench capacitor using anti-ferroelectric (AFE) HfxZr1-xO2 (HZO) is experimentally demonstrated as a promising option for embedded dynamic random-access memory (eDRAM) by showing (i) a successful 10ns polarization switching for read/write operations, (ii) maximum operating voltage less than 1.8V, (iii) retention much longer than 1ms, and (iv) endurance reaching 1012 cycles at elevated temperature. Polarization-voltage (P-V) characteristics and endurance behavior in AFE HZO capacitors are explored through both modeling and P-V evolution during field cycling under extensive pulsing schemes. It is shown that (i) defect diffusion driven by depolarization and (ii) partial domain switching play important roles in endurance fatigue. Finally, a vertical stack with multiple HZO capacitors in parallel is demonstrated, showing a 1T- multi-C memory architecture as a viable path toward future ultra-high density eDRAM technology.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131468528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes 3d优化的SRAM宏设计及其在高级节点上的内存-逻辑3d集成电路的应用

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9371905

R. Chen, P. Weckx, S. Salahuddin, S.-W. Kim, G. Sisto, G. van der Plas, M. Stucchi, R. Baert, P. Debacker, M. Na, J. Ryckaert, D. Milojevic, E. Beyne

引用次数: 11

Past and Future of 3D Flash 3D Flash的过去和未来

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9371959

J. Alsmeier, M. Higashitani, S. Paak, S. Sivaram

引用次数: 8

A 4.6μm, 512×512, Ultra-Low Power Stacked Digital Pixel Sensor with Triple Quantization and 127dB Dynamic Range 一种4.6μm, 512×512，超低功耗堆叠数字像素传感器，三量化，动态范围127dB

2020 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2020-12-12 DOI: 10.1109/IEDM13553.2020.9371913

Chiao Liu, Lyle Bainbridge, A. Berkovich, Song Chen, Wei Gao, Tsung-Hsun Tsai, K. Mori, R. Ikeno, Masayuki Uno, T. Isozaki, Y. Tsai, I. Takayanagi, J. Nakamura

引用次数: 6