2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)最新文献_第5页

Dynamic LDPC codes for nanoscale memory with varying fault arrival rates 具有不同故障到达率的纳米级存储器动态LDPC码

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2011-04-06 DOI: 10.1109/DTIS.2011.5941439

Shalini Ghosh, P. Lincoln

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引用次数: 4

On the diminished-1 modulo 2N+1 fused multiply-add units 在减小-1模2N+1熔接乘加单元上

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2011-04-06 DOI: 10.1109/DTIS.2011.5941427

C. Efstathiou, I. Voyiatzis

引用次数: 4

A CMOS linear-in-dB VGA based on exponential current generator 基于指数电流发生器的CMOS线性-in- db VGA

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2011-04-06 DOI: 10.1109/DTIS.2011.5941429

V. Kalenteridis, S. Vlassis, S. Siskos

引用次数: 11

A standard-cell library suite for deep-deep sub-micron CMOS technologies 深深亚微米CMOS技术的标准单元库套件

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2011-04-06 DOI: 10.1109/DTIS.2011.5941445

D. Bekiaris, A. Papanikolaou, G. Stamelos, D. Soudris, G. Economakos, K. Pekmestzi

引用次数: 5

Power reduction through X-filling of transition fault test vectors for LOS testing 通过对过渡故障测试向量进行x填充来降低LOS测试的功耗

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2010-05-27 DOI: 10.1109/DTIS.2011.5941434

F. Wu, L. Dilillo, A. Bosio, P. Girard, S. Pravossoudovitch, A. Virazel, M. Tehranipoor, K. Miyase, X. Wen, N. Ahmed

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引用次数: 21