{"title":"Adiabatic pseudo-domino logic with dual-rail inputs","authors":"H. Wong, K. Lau","doi":"10.1109/MWSCAS.2001.986182","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986182","url":null,"abstract":"Balanced evaluation branches for dual-rail logic are essential not only to minimize the power dissipation but also to improve the operating frequency of the circuit. In this paper, a fully dual-rail input signaling structure is adopted for the APDL family, even though it increases the number of the transistors in the original circuit. HSPICE simulation shows that DAPDL shift register dissipates 6 times lesser energy than its static CMOS counterpart.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114480510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient lossless image compression using a simple adaptive DPCM model","authors":"M. Das, S. Chande","doi":"10.1109/MWSCAS.2001.986140","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986140","url":null,"abstract":"This paper introduces a predictive image compression scheme based on a new suboptimal, adaptive DPCM coder. The primary focus of this paper is on a lossless compression scheme, which incorporates three novel ideas: a simple two-step predictive structure, a simple pixel-by-pixel adaptation scheme that guarantees stability of the predictive coder, and a simple contextual entropy coder for the residuals. Also, some of these ideas are modified and extended to derive a lossy compression scheme. Experimental studies indicate that despite its overall simplicity, the proposed coder delivers significantly better compression than conventional DPCM techniques.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114516166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Normalized peak ripple magnitude as an objective function in discrete coefficient FIR filter design","authors":"T. Çiloglu","doi":"10.1109/MWSCAS.2001.986130","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986130","url":null,"abstract":"Normalized peak ripple magnitude (NPRM) has been a convenient design criterion for discrete coefficient FIR filters. \"Filter gain\" is the major concern for NPRM. This paper presents an exact closed form expression of the filter gain for a given set of filter coefficients. Based on this expression the characteristics of NPRM cost function are discussed. The selection of the initial value of the filter gain for suboptimal design methods is considered. Deficiency of the previously proposed methods is pointed out and a way to overcome the problem is presented. Proposed solution provides additional information that has been proved to be useful in determining the initial point when using a suboptimal optimization method.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115424964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A statistical MOS model for CAD of submicrometer analog IC's","authors":"P. Crippa, C. Turchetti, M. Conti","doi":"10.1109/MWSCAS.2001.986333","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986333","url":null,"abstract":"A novel statistical model for MOS transistor drain current has been developed that allows us to explore IC architectures and study the effects of technological variations on the system performance without using time-consuming Monte Carlo simulations. Characterizing this model only requires a cheap and simple estimation of the mean value and autocorrelation function of a single stochastic process describing all the process/device variations.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126233698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Spiking analog neuron circuit design, analysis, and simulation","authors":"Robert H. Fujii, R. Nemoto, N. Satou","doi":"10.1109/MWSCAS.2001.986216","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986216","url":null,"abstract":"A transistor-level analog circuit design of a spiking neuron is proposed. The circuit was simulated using using BSIM3 0.8 /spl mu/m geometry MOS transistor parameters provided by MOSIS. Most of the circuits work in the MOS sub-threshold region of operation to achieve very low power consumption. Supply voltage was set at 2.8 V As examples of neural networks, feed-forward and feed-back neural networks capable of recognizing black and white patterns were simulated using a transistor level circuit simulator Static power dissipation of the proposed neuron was estimated to be approximately 180 pW for the dendrite and 56 pW for the soma. In the dynamic mode, energy consumption was estimated to be 5.1 pJ (dendrite) and 1.2 pJ (soma) per activation. An analog HDL simulator was also used to simulate neural network behavior for the larger neural network examples.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128030855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Adaptive format conversion for video scalability at low enhancement bitrates","authors":"W. Wan, J.S. Lim","doi":"10.1109/MWSCAS.2001.986260","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986260","url":null,"abstract":"The enhancement layer in many scalable coding algorithms is composed of residual coding information. Another type of information, adaptive format conversion (AFC), can also provide video scalability. This paper introduces AFC and demonstrates how it can provide scalability at low enhancement bitrates which is often not possible with residual coding.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125829484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Solving of discrete multiobjective problems using an evolutionary algorithm with a repair mechanism","authors":"J. Zydallis, G. Lamont","doi":"10.1109/MWSCAS.2001.986213","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986213","url":null,"abstract":"The solving of real-world multiobjective problems (MOPs) with an evolutionary algorithm (EA) is an increasing area of interest Presented in this paper is the application of a building block based EA to a real-world discrete MOP. A constraint handling method had to be designed and employed. The description of this method and the repair mechanism instrumental in repairing infeasible solutions is described in detail along with statistical analysis.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126028051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Two fully differential low-voltage MOSFET-C voltage-controlled oscillators for frequency tuning","authors":"Tsung-Sum Lee, Tai-hua Chen","doi":"10.1109/MWSCAS.2001.986154","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986154","url":null,"abstract":"Two fully differential low-voltage MOSFET-C voltage-controlled oscillators for the purpose of frequency-tuning of filters are proposed. These two oscillators are guaranteed to start oscillating and provide well-controlled amplitude. The performance of these two circuits is demonstrated by simulation results.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"247 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126047199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Technique to eliminate slow-settling components that appear due to dipoles [multipath compensated amplifiers]","authors":"M. Schlarmann, R. Geiger","doi":"10.1109/MWSCAS.2001.986118","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986118","url":null,"abstract":"Due to their low-voltage compatibility and potential for high-speed operation, multipath compensated amplifiers offer potential for implementation in low-voltage processes. They are not practical for high-speed applications yet because they have low frequency dipoles which result in slow-settling components appearing in the transient response. This work outlines a self-calibration methodology that attempts to extend the performance of multipath compensated amplifiers into the high-speed realm by ensuring pole-zero cancellation to a certain degree of accuracy.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127295177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimization of MPEG-4 GA AAC on general PC","authors":"Do Hyoung Kim, Dong Hyun Kim, Jae-Ho Chung","doi":"10.1109/MWSCAS.2001.986338","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986338","url":null,"abstract":"MPEG-4 General Audio (GA) Encoder/Decoder has inherited MPEG-2 AAC (Advanced Audio Coding) and added TVQ and other algorithms as scalable options. In this paper, the authors deal with the method of optimization of a MPEG-4 AAC scalable encoder. An original MPEG-4 VM source takes 15 times to 30 times the encoding time of the original sample playing time as its options, although this can be changed for varying CPU and memory conditions. The authors mainly used the reduction of unnecessary loop or the loop-unrolling technology to improve the encoder performance. For this work, firstly they performed the profiling based on general PC and checked the frequency or complexity of each function, and then selected the target function to be optimized.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123681705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}