{"title":"A novel digital controlled technique for operational amplifier compensation","authors":"Woo Jin Kim, S. Sompur, Yong-Bin Kim","doi":"10.1109/MWSCAS.2001.986151","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986151","url":null,"abstract":"In this paper, a method for operational amplifier compensation is described. An operational amplifier having an offset as high as /spl plusmn/20 mV can be compensated to have a residual offset of as low as /spl plusmn/1 mV. The offset is achieved by trimming the currents in the active loads of the differential pair stage of the op-amp. The trimming currents are obtained by means of a series of binary weighted current sinks. The result of compensation can be observed digitally. and the trim data that is needed to switch on or off the current sinks can also be sent serially in digital format. In this paper, a chip has been designed which incorporates the afore-mentioned compensation technique, and the initial version of the chip without the digital interface logic has been fabricated using AMI 0.5 /spl mu/m CMOS technology.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126356695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new text-independent method for phoneme segmentation","authors":"G. Aversano, A. Esposito, M. Marinaro","doi":"10.1109/MWSCAS.2001.986241","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986241","url":null,"abstract":"A new approach for text-independent speech segmentation is proposed. The novelty consists in a preprocessing based on critical-band perceptual analysis and an original algorithm for the individuation of phoneme boundaries. The results are promising since the method gives /spl sim/74% of correct segmentation without presenting over-segmentation.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":" 23","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132011632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 1 GHz 1.8 V monolithic CMOS PLL with improved locking","authors":"Jian Zhou, Huiting Chen","doi":"10.1109/MWSCAS.2001.986211","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986211","url":null,"abstract":"A 1 GHz 1.8 V monolithic CMOS phase-locked loop (PLL) circuit for high-speed serial bus applications is presented. The monolithic PLL consists of a dead-less phase frequency detector, a charge pump, a bias generator circuit with an auxiliary bias generator to secure locking, a voltage-controlled oscillator and a differential to single-ended converter with duty cycle correction. A startup circuit is added to prevent the PLL from false locking and to expedite the locking. The PLL has been fabricated in a 0.18 /spl mu/m CMOS technology, occupying an active area of 0.02 mm/sup 2/. The PLL can operate from 100 MHz up to 1.2 GHz and consumes less than 10 mW from a 1.8 V supply.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"201 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133953427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fully integrated dual-mode frequency synthesizer for GSM and Wideband CDMA in 0.5/spl mu/m CMOS","authors":"Y. Tang, A. Aktas, M. Ismail, S. Bibyk","doi":"10.1109/MWSCAS.2001.986324","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986324","url":null,"abstract":"A fully integrated dual-mode frequency synthesizer for GSM and Wideband CDMA (WCDMA) is presented. The synthesizer is designed to maximize hardware sharing between the two modes by applying fractional frequency synthesis to GSM mode and integer frequency synthesis to WCDMA mode. The shared components include phase frequency detector (PFD), charge pump (CP), loop filter, integer frequency divider and VCO, which is 70% of the entire synthesizer in term of die area. A high-speed low power dual modulus prescaler is proposed to operate up to 2.1GHz at 3.3V supply voltage with 11.6mW power consumption by simulation. A dual mode VCO is also proposed for the enhanced tuning range with an accumulation mode NMOS varactor for band-to-band tuning and a p/sup +/n junction varactor for in-band tuning. The simulation result shows that the synthesizer phase noise is -112dBc/Hz at 600kHz offset frequency for WCDMA mode and -117 dBc/Hz for GSM mode.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130996449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"System requirements for super Terabit routing","authors":"M. Nourani, Gautam Kavipurapu, Raju Gadiraju","doi":"10.1109/MWSCAS.2001.986339","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986339","url":null,"abstract":"Rapid growth of Internet and huge demand for higher data transfer rate created a challenge for network, processor and communication engineers. In this paper, we first discuss the deficiencies of the conventional routing switch architectures. Then, we present a novel switch strategy based on space and time division multiplexing and a system level architecture by which achieving several hundred of Terabits per second throughput for networking equipments becomes possible.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"282 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133264213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. T. Moskowitz, M. Saubhayana, L. Sellami, R. W. Newcomb
{"title":"Control of otoacoustic emission scattering waveform with anti-noise","authors":"M. T. Moskowitz, M. Saubhayana, L. Sellami, R. W. Newcomb","doi":"10.1109/MWSCAS.2001.986117","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986117","url":null,"abstract":"We demonstrate a framework for eliminating significant perturbations along a cascade scattering model of the inner ear. This allows for the conception of a novel scheme of acute anti-noise stimulation at the cochlear level that can be particularly applicable to the class of tinnitus (ringing in the ear) that is aurally originated (peripheral). Peripherally induced tinnitus is often associated with the occurrence of spontaneous and evoked otoacoustic emissions, partially described by Kemp echoes, the basis of the scattering cochlea model (Sellami and Newcomb, IEEE Trans. Circuits and Systems-I, vol. 44, no. 2, pp 174-180, 1997). We propose that a refined version of the work presented here can be fit to individuals with hearing-loss induced tinnitus.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131661785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Some analog building blocks for TFT circuits","authors":"R. Itou, M. Kayama, T. Shima","doi":"10.1109/MWSCAS.2001.986201","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986201","url":null,"abstract":"The analog circuits fabricated by the amorphous and/or polycrystalline silicon TFT suffer from very wide deviation effects of the threshold voltage Vth and the current gain /spl beta/. This paper proposes some analog building blocks for TFT circuits, in which the techniques to reduce the effects caused by the threshold voltage and the current gain /spl beta/ mismatch of the transistors are used. First, Vth and /spl beta/ deviation-free differential amplifier is discussed. Second, Vth deviation-free current source is proposed. Finally, Vth and /spl beta/ deviation-free class A amplifier is presented. The test chip to verify the proposed idea has been simulated and designed using VDEC design environment.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114428098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Speaker verification/recognition and the importance of selective feature extraction: review","authors":"P. Premakanthan, W. B. Mikhael","doi":"10.1109/MWSCAS.2001.986114","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986114","url":null,"abstract":"Speaker Recognition (SR) is the process of automatically recognizing the person speaking on the basis of the information obtained from the speech features. SR process involves Speaker verification (SV) and Speaker Identification (SI). Automatic Speaker verification (ASV) is the process of authenticating the true identity of the speaker. ASV is generally accomplished in four steps. The first step is the digital speech data acquisition. In the second step, feature extraction and feature selection are performed. The third step involves clustering the feature vectors and storing in a database. Decision-making through Pattern matching is the last step. In this paper, the main techniques followed in each of the above steps are reviewed. The importance of feature vector extraction, selection and normalization are also discussed.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123572249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low-power filter bank structure using block filters","authors":"Sejung Yang, Youngbeom Jang","doi":"10.1109/MWSCAS.2001.986137","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986137","url":null,"abstract":"A block filter implementation technique for uniform filter banks is proposed in this paper. By applying block filters into decimation and interpolation filters, it is shown that down and zip samplers are cancelled out in respective filters. Furthermore, by applying block filters into uniform filter banks, significant reduction for computational complexity is achieved since prototype filter can be shared in each channel implementation. Also, it is shown that the proposed implementation is a reconfigurable structure in term of filter order variation.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124802673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wavelet packet denoising for mammogram enhancement","authors":"M. Elsherif, A. Elsayad","doi":"10.1109/MWSCAS.2001.986144","DOIUrl":"https://doi.org/10.1109/MWSCAS.2001.986144","url":null,"abstract":"This paper presents an algorithm for denoising and enhancement of mammogram images. The proposed algorithm aims to assist the radiologist toward fast detection and diagnosis of breast cancer. The wavelet packet transform decomposes mammogram images into wavelet packet multiresolution representation. Three different types of mother wavelets have been considered: daubechie-8, Symmlet-8 and Coiflet-5. Nonlinear enhancement function based on the soft-thresholding scheme applied to the decomposed images. A data set of about twenty mammograms with different sizes and types of breast cancer have been used to test the proposed algorithm. The performance of the system is evaluated by two radiologists, who specialized in mammography. Experimental results demonstrate that the proposed technique can be employed to remove noise, enhance, and increase the contrast between malignant and normal tissues.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129766237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}